UV PLD, 15ns, PAL-Type, CMOS, CDIP28, WINDOWED, CERDIP-28
| Parameter Name | Attribute value |
| Is it lead-free? | Contains lead |
| Is it Rohs certified? | incompatible |
| Parts packaging code | DIP |
| package instruction | DIP, DIP28,.3 |
| Contacts | 28 |
| Reach Compliance Code | unknown |
| ECCN code | EAR99 |
| Other features | MACROCELLS INTERCONNECTED BY PIA; 1 LAB; 32 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| Architecture | PAL-TYPE |
| maximum clock frequency | 76.9 MHz |
| JESD-30 code | R-GDIP-T28 |
| JESD-609 code | e0 |
| Dedicated input times | 7 |
| Number of I/O lines | 16 |
| Number of entries | 24 |
| Output times | 16 |
| Number of product terms | 320 |
| Number of terminals | 28 |
| Maximum operating temperature | 70 °C |
| Minimum operating temperature | |
| organize | 7 DEDICATED INPUTS, 16 I/O |
| Output function | MACROCELL |
| Package body material | CERAMIC, GLASS-SEALED |
| encapsulated code | DIP |
| Encapsulate equivalent code | DIP28,.3 |
| Package shape | RECTANGULAR |
| Package form | IN-LINE |
| Peak Reflow Temperature (Celsius) | 220 |
| power supply | 5 V |
| Programmable logic type | UV PLD |
| propagation delay | 15 ns |
| Certification status | Not Qualified |
| Maximum supply voltage | 5.25 V |
| Minimum supply voltage | 4.75 V |
| Nominal supply voltage | 5 V |
| surface mount | NO |
| technology | CMOS |
| Temperature level | COMMERCIAL |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | THROUGH-HOLE |
| Terminal pitch | 2.54 mm |
| Terminal location | DUAL |
| Maximum time at peak reflow temperature | 30 |
| Base Number Matches | 1 |
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