Z8 GP
TM
Microcontrollers
ZGR323L ROM MCU
Family
Product Specification
PS023910-0408
Copyright ©2008 by Zilog
®
, Inc. All rights reserved.
www.zilog.com
Warning:
DO NOT USE IN LIFE SUPPORT
LIFE SUPPORT POLICY
ZILOG'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE
SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF
THE PRESIDENT AND GENERAL COUNSEL OF ZILOG CORPORATION.
As used herein
Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b)
support or sustain life and whose failure to perform when properly used in accordance with instructions for
use provided in the labeling can be reasonably expected to result in a significant injury to the user. A
critical component is any component in a life support device or system whose failure to perform can be
reasonably expected to cause the failure of the life support device or system or to affect its safety or
effectiveness.
Document Disclaimer
©2008 by Zilog, Inc. All rights reserved. Information in this publication concerning the devices,
applications, or technology described is intended to suggest possible uses and may be superseded. ZILOG,
INC. DOES NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY
OF THE INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT.
Z I L O G A L S O D O E S N O T A S S U M E L I A B I L I T Y F O R I N T E L L E C T U A L P R O P E RT Y
INFRINGEMENT RELATED IN ANY MANNER TO USE OF INFORMATION, DEVICES, OR
TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. The information contained within this
document has been verified according to the general principles of electrical and mechanical engineering.
Z8, Z8 Encore!, Crimzon, and ZNEO are trademarks or registered trademarks of Zilog, Inc. All other
product or service names are the property of their respective owners.
PS023910-0408
ZGR323L
Product Specification
iii
Revision History
Each instance in Revision History reflects a change to this document from its previous
revision. For more details, refer to the corresponding pages and appropriate links in the
table below.
Revision
Level
10
09
08
07
06
Page
No
92
All
ii
52
Date
April 2008
September
2007
July
2007
May
2006
November
2005
Description
Updated
Part Number Description
section.
Replaced OTP with ROM and EPROM with MASK throughout the
document.
Updated Disclaimer section.
Added Pin 22 in SMR Input,
Figure 33.
Updated “Ordering Information” on page 89, added Caution for I/O
53, 54
ports 0, 1 and 2 on pages 17 and 18, and added new Clock information
on pages 53 and 54.
PS023910-0408
Revision History
ZGR323L
Product Specification
iv
Table of Contents
Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Development Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
XTAL1 Crystal 1 (Time-Based Input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
XTAL2 Crystal 2 (Time-Based Output) . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input/Output Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port 3 (P37–P30) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RESET (Input, Active Low) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Expanded Register File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Register File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Counter/Timer Functional Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power-On Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
10
10
10
14
18
19
19
19
20
23
24
25
33
42
46
47
Expanded Register File Control Registers (0D) . . . . . . . . . . . . . . . . . . . . . . . . 58
Expanded Register File Control Registers (0F) . . . . . . . . . . . . . . . . . . . . . . . . . 63
Standard Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Standard Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Customer Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
81
83
89
93
97
PS023910-0408
Table of Contents
ZGR323L
Product Specification
1
Architectural Overview
Zilog’s ZGR323L is an ROM-based member of the MCU family of infrared
microcontrollers. With 237 B of general-purpose RAM and 8 KB to 32 KB of ROM,
Zilog’s CMOS microcontrollers offer fast-executing, efficient use of memory,
sophisticated interrupts, input/output bit manipulation capabilities, automated pulse
generation/reception, and internal key-scan pull-up transistors.
The ZGR323L architecture (see
Figure 1)
is based on Zilog’s 8-bit microcontroller core
with an Expanded Register File allowing access to register-mapped peripherals, input/
output (I/O) circuits, and powerful counter/timer circuitry. The Z8
®
CPU offers a flexible
I/O scheme, an efficient register and address space structure, and a number of ancillary
features that are useful in many consumer, automotive, computer peripheral, and battery-
operated hand-held applications.
There are three basic address spaces available to support a wide range of configurations:
Program Memory, Register File and Expanded Register File. The register file is composed
of 256 Bytes of RAM. It includes 4 I/O port registers, 16 control and status registers, and
236 general-purpose registers. The Expanded Register File consists of two additional
register groups (F and D).
To unburden the program from coping with such real-time problems as generating
complex waveforms or receiving and demodulating complex waveform/pulses, the
ZGR323L offers a new intelligent counter/timer architecture with 8-bit and 16-bit counter/
timers (see
Figure 2).
Also included are a large number of user-selectable modes and two
on-board comparators to process analog signals with separate reference voltages.
Note:
All signals with an overline, “ ”, are active Low. For example, B/W, in which WORD is
active Low, and B/W, in which BYTE is active Low.
Power connections use the conventional descriptions listed in
Table 1.
Table 1. Power Connections
Connection
Power
Ground
Circuit
V
CC
GND
Device
V
DD
V
SS
PS023910-0408
Architectural Overview
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