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LMUN2111LT3G

Description
Bias Resistor Transistors
CategoryDiscrete semiconductor    The transistor   
File Size401KB,10 Pages
ManufacturerLRC
Websitehttp://www.lrc.cn
Download Datasheet Parametric View All

LMUN2111LT3G Overview

Bias Resistor Transistors

LMUN2111LT3G Parametric

Parameter NameAttribute value
MakerLRC
package instruction,
Reach Compliance Codeunknow
Maximum collector current (IC)0.1 A
Minimum DC current gain (hFE)35
Number of components1
Polarity/channel typePNP
Maximum power dissipation(Abs)0.4 W
surface mountYES
Transistor component materialsSILICON
LESHAN RADIO COMPANY, LTD.
Bias Resistor Transistors
PNP Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base-emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the SOT-23
package which is designed for low power surface mount applications.
LMUN2111LT1G
SERIES
3
1
2
SOT-23
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
The SOT-23 package can be soldered using wave or reflow. The
modified gull-winged leads absorb thermal stress during soldering
eliminating the possibility of damage to the die.
Available in 8 mm embossed tape and reel. Use the Device Number
to order the 7 inch/3000 unit reel. Replace “T1” with “T3” in the
Device Number to order the 13 inch/10,000 unit reel.
PIN 1
BASE
(INPUT)
R
1
PIN 3
COLLECTOR
(OUTPUT)
R
2
PIN 2
EMITTER
(GROUND)
We declare that the material of product compliance with RoHS requirements.
MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted)
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
Symbol
V
CBO
V
CEO
I
C
Value
50
50
100
Unit
Vdc
Vdc
mAdc
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance –
Junction-to-Ambient
Thermal Resistance –
Junction-to-Lead
Junction and Storage
Temperature Range
1. FR–4 @ Minimum Pad
2. FR–4 @ 1.0 x 1.0 inch Pad
Symbol
P
D
Max
246 (Note 1.)
400 (Note 2.)
1.5 (Note 1.)
2.0 (Note 2.)
508 (Note 1.)
311 (Note 2.)
174 (Note 1.)
208 (Note 2.)
–55 to +150
Unit
mW
°C/W
°C/W
°C/W
°C
R
θJA
R
θJL
T
J
, T
stg
1/8
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