74LV30DB datasheet, PDF - EEWORLD Datasheet

74LV30DB: DescriptionNAND Gate, CMOS, PDSO14,; Categorylogic logic; File Size390KB，9 Pages; ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.); Websitehttps://www.nxp.com/

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74LV30DB Overview

NAND Gate, CMOS, PDSO14,

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Philips Semiconductors (NXP Semiconductors N.V.)
package instruction	SSOP, SSOP14,.3
Reach Compliance Code	unknown
JESD-30 code	R-PDSO-G14
JESD-609 code	e0
Load capacitance (CL)	50 pF
Logic integrated circuit type	NAND GATE
MaximumI(ol)	0.012 A
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Encapsulate equivalent code	SSOP14,.3
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
power supply	3.3 V
Prop。Delay @ Nom-Sup	16 ns
Certification status	Not Qualified
Schmitt trigger	NO
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	DUAL
Base Number Matches	1

	74LV30DB	74LV30N	74LV30PW
Description	NAND Gate, CMOS, PDSO14,	NAND Gate, CMOS, PDIP14,	NAND Gate, CMOS, PDSO14,
Is it Rohs certified?	incompatible	incompatible	incompatible
package instruction	SSOP, SSOP14,.3	DIP, DIP14,.3	TSSOP, TSSOP14,.25
Reach Compliance Code	unknown	unknown	unknown
JESD-30 code	R-PDSO-G14	R-PDIP-T14	R-PDSO-G14
JESD-609 code	e0	e0	e0
Load capacitance (CL)	50 pF	50 pF	50 pF
Logic integrated circuit type	NAND GATE	NAND GATE	NAND GATE
MaximumI(ol)	0.012 A	0.012 A	0.012 A
Number of terminals	14	14	14
Maximum operating temperature	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SSOP	DIP	TSSOP
Encapsulate equivalent code	SSOP14,.3	DIP14,.3	TSSOP14,.25
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH	IN-LINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
power supply	3.3 V	3.3 V	3.3 V
Prop。Delay @ Nom-Sup	16 ns	16 ns	16 ns
Certification status	Not Qualified	Not Qualified	Not Qualified
Schmitt trigger	NO	NO	NO
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V
surface mount	YES	NO	YES
technology	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	THROUGH-HOLE	GULL WING
Terminal pitch	0.635 mm	2.54 mm	0.635 mm
Terminal location	DUAL	DUAL	DUAL
Maker	Philips Semiconductors (NXP Semiconductors N.V.)	-	Philips Semiconductors (NXP Semiconductors N.V.)
Base Number Matches	1	1	-

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