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74ACT08MTCX_NL

Description
AC SERIES, QUAD 2-INPUT AND GATE, PDSO14
Categorylogic    logic   
File Size101KB,7 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74ACT08MTCX_NL Overview

AC SERIES, QUAD 2-INPUT AND GATE, PDSO14

74ACT08MTCX_NL Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP14,.25
Contacts14
Reach Compliance Codecompli
seriesACT
JESD-30 codeR-PDSO-G14
JESD-609 codee3
length5 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeAND GATE
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply5 V
Prop。Delay @ Nom-Su10 ns
propagation delay (tpd)10 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width4.4 mm
Base Number Matches1
74AC08 • 74ACT08 Quad 2-Input AND Gate
November 1988
Revised February 2005
74AC08 • 74ACT08
Quad 2-Input AND Gate
General Description
The AC/ACT08 contains four, 2-input AND gates.
Features
s
I
CC
reduced by 50% on 74AC only
s
Outputs source/sink 24 mA
Ordering Code:
Order Number
74AC08SC
74AC08SJ
74AC08MTC
74AC08MTCX_NL
(Note 1)
74AC08PC
74AC08PC_NL
(Note 1)
74ACT08SC
74ACT08SCX_NL
(Note 1)
74ACT08MTC
74ACT08MTCX_NL
(Note 1)
74ACT08PC
74ACT08PC_NL
(Note 1)
Package
Number
M14A
M14D
MTC14
MTC14
N14A
N14A
M14A
M14A
MTC14
MTC14
N14A
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. (PC not available in Tape and Reel.)
Pb-Free package per JEDEC J-STD-020B.
Note 1:
“_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Use this number to order device.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
A
n
, B
n
O
n
FACT
¥
is a trademark of Fairchild Semiconductor Corporation.
Description
Inputs
Outputs
© 2005 Fairchild Semiconductor Corporation
DS009914
www.fairchildsemi.com

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Description AC SERIES, QUAD 2-INPUT AND GATE, PDSO14 AC SERIES, QUAD 2-INPUT AND GATE, PDSO14 AC SERIES, QUAD 2-INPUT AND GATE, PDSO14 AC SERIES, QUAD 2-INPUT AND GATE, PDSO14 AC SERIES, QUAD 2-INPUT AND GATE, PDSO14 AC SERIES, QUAD 2-INPUT AND GATE, PDSO14 AC SERIES, QUAD 2-INPUT AND GATE, PDSO14 AC SERIES, QUAD 2-INPUT AND GATE, PDSO14
series ACT AC AC AC AC ACT AC ACT
length 5 mm 5 mm 19.18 mm 5 mm 10.2 mm 19.18 mm 5 mm 8.6235 mm
Number of functions 4 4 4 4 4 4 4 4
Number of terminals 14 14 14 14 14 14 14 14
Maximum operating temperature 85 °C 85 °C 85 °C 85 Cel 85 °C 85 °C 85 Cel 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 Cel -40 °C -40 °C -40 Cel -40 °C
surface mount YES YES NO YES YES NO YES YES
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form GULL WING GULL WING THROUGH-HOLE GULL WING GULL WING THROUGH-HOLE GULL WING GULL WING
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
width 4.4 mm 4.4 mm 7.62 mm 4.4 mm 5.3 mm 7.62 mm 4.4 mm 3.9 mm
Is it Rohs certified? conform to conform to conform to - conform to conform to - conform to
Maker Fairchild Fairchild Fairchild - Fairchild Fairchild - Fairchild
Parts packaging code TSSOP TSSOP DIP - SOP DIP - SOIC
package instruction TSSOP, TSSOP14,.25 TSSOP, TSSOP14,.25 DIP, DIP14,.3 - SOP, SOP14,.3 DIP, DIP14,.3 - SOP, SOP14,.25
Contacts 14 14 14 - 14 14 - 14
Reach Compliance Code compli compli unknow - compli compli - compli
JESD-30 code R-PDSO-G14 R-PDSO-G14 R-PDIP-T14 - R-PDSO-G14 R-PDIP-T14 - R-PDSO-G14
JESD-609 code e3 e3 - - e3 e3 - e3
Load capacitance (CL) 50 pF 50 pF 50 pF - 50 pF 50 pF - 50 pF
Logic integrated circuit type AND GATE AND GATE AND GATE - AND GATE AND GATE - AND GATE
MaximumI(ol) 0.024 A 0.012 A 0.012 A - 0.012 A 0.024 A - 0.024 A
Number of entries 2 2 2 - 2 2 - 2
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY
encapsulated code TSSOP TSSOP DIP - SOP DIP - SOP
Encapsulate equivalent code TSSOP14,.25 TSSOP14,.25 DIP14,.3 - SOP14,.3 DIP14,.3 - SOP14,.25
Package shape RECTANGULAR RECTANGULAR RECTANGULAR - RECTANGULAR RECTANGULAR - RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH IN-LINE - SMALL OUTLINE IN-LINE - SMALL OUTLINE
method of packing TAPE AND REEL TAPE AND REEL RAIL - TAPE AND REEL RAIL - TAPE AND REEL
Peak Reflow Temperature (Celsius) 260 260 - - 260 NOT APPLICABLE - 260
power supply 5 V 3.3/5 V 3.3/5 V - 3.3/5 V 5 V - 5 V
Prop。Delay @ Nom-Su 10 ns 10 ns 10 ns - 10 ns 10 ns - 10 ns
propagation delay (tpd) 10 ns 10 ns 10 ns - 10 ns 10 ns - 10 ns
Certification status Not Qualified Not Qualified Not Qualified - Not Qualified Not Qualified - Not Qualified
Schmitt trigger NO NO NO - NO NO - NO
Maximum seat height 1.2 mm 1.2 mm 5.08 mm - 2.1 mm 5.08 mm - 1.753 mm
Maximum supply voltage (Vsup) 5.5 V 6 V 6 V - 6 V 5.5 V - 5.5 V
Minimum supply voltage (Vsup) 4.5 V 2 V 2 V - 2 V 4.5 V - 4.5 V
Nominal supply voltage (Vsup) 5 V 3.3 V 3.3 V - 3.3 V 5 V - 5 V
technology CMOS CMOS CMOS - CMOS CMOS - CMOS
Terminal surface Matte Tin (Sn) Matte Tin (Sn) - - Matte Tin (Sn) Matte Tin (Sn) - MATTE TIN
Terminal pitch 0.65 mm 0.65 mm 2.54 mm - 1.27 mm 2.54 mm - 1.27 mm
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED - - NOT SPECIFIED NOT APPLICABLE - NOT SPECIFIED
Base Number Matches 1 1 1 - 1 1 - 1
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