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74ACT08PCX

Description
AC SERIES, QUAD 2-INPUT AND GATE, PDSO14
Categorysemiconductor    logic   
File Size101KB,7 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
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74ACT08PCX Overview

AC SERIES, QUAD 2-INPUT AND GATE, PDSO14

74ACT08PCX Parametric

Parameter NameAttribute value
Number of functions4
Number of terminals14
Minimum operating temperature-40 Cel
Maximum operating temperature85 Cel
Rated supply voltage3.3
Minimum supply/operating voltage2 V
Maximum supply/operating voltage6 V
Processing package description4.40 MM, MO-153AB, TSSOP-14
each_compliYes
EU RoHS regulationsYes
stateActive
Logic IC typeAND GATE
sub_categoryGates
seriesAC
jesd_30_codeR-PDSO-G14
jesd_609_codee4
load_capacitance__cl_50 pF
max_i_ol_0.0120 Am
moisture_sensitivity_level1
Number of inputs2
Packaging MaterialsPLASTIC/EPOXY
ckage_codeTSSOP
ckage_equivalence_codeTSSOP14,.25
packaging shapeRECTANGULAR
Package SizeSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
cking_methodRAIL
eak_reflow_temperature__cel_260
wer_supplies__v_3.3/5
._delay_nom_su10 ns
propagation delay TPD10 ns
qualification_statusCOMMERCIAL
schmitt_triggeNO
seated_height_max1.2 mm
surface mountYES
CraftsmanshipCMOS
Temperature levelINDUSTRIAL
terminal coatingNICKEL PALLADIUM GOLD
Terminal formGULL WING
Terminal spacing0.6500 mm
Terminal locationDUAL
ime_peak_reflow_temperature_max__s_30
length5 mm
width4.4 mm
74AC08 • 74ACT08 Quad 2-Input AND Gate
November 1988
Revised February 2005
74AC08 • 74ACT08
Quad 2-Input AND Gate
General Description
The AC/ACT08 contains four, 2-input AND gates.
Features
s
I
CC
reduced by 50% on 74AC only
s
Outputs source/sink 24 mA
Ordering Code:
Order Number
74AC08SC
74AC08SJ
74AC08MTC
74AC08MTCX_NL
(Note 1)
74AC08PC
74AC08PC_NL
(Note 1)
74ACT08SC
74ACT08SCX_NL
(Note 1)
74ACT08MTC
74ACT08MTCX_NL
(Note 1)
74ACT08PC
74ACT08PC_NL
(Note 1)
Package
Number
M14A
M14D
MTC14
MTC14
N14A
N14A
M14A
M14A
MTC14
MTC14
N14A
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. (PC not available in Tape and Reel.)
Pb-Free package per JEDEC J-STD-020B.
Note 1:
“_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Use this number to order device.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
A
n
, B
n
O
n
FACT
¥
is a trademark of Fairchild Semiconductor Corporation.
Description
Inputs
Outputs
© 2005 Fairchild Semiconductor Corporation
DS009914
www.fairchildsemi.com

74ACT08PCX Related Products

74ACT08PCX 74AC08MTCX_NL 74AC08PC_NL 74AC08PCX 74AC08SJX 74ACT08MTCX_NL 74ACT08PC_NL 74ACT08SCX_NL
Description AC SERIES, QUAD 2-INPUT AND GATE, PDSO14 AC SERIES, QUAD 2-INPUT AND GATE, PDSO14 AC SERIES, QUAD 2-INPUT AND GATE, PDSO14 AC SERIES, QUAD 2-INPUT AND GATE, PDSO14 AC SERIES, QUAD 2-INPUT AND GATE, PDSO14 AC SERIES, QUAD 2-INPUT AND GATE, PDSO14 AC SERIES, QUAD 2-INPUT AND GATE, PDSO14 AC SERIES, QUAD 2-INPUT AND GATE, PDSO14
Number of functions 4 4 4 4 4 4 4 4
Number of terminals 14 14 14 14 14 14 14 14
Minimum operating temperature -40 Cel -40 °C -40 °C -40 Cel -40 °C -40 °C -40 °C -40 °C
Maximum operating temperature 85 Cel 85 °C 85 °C 85 Cel 85 °C 85 °C 85 °C 85 °C
series AC AC AC AC AC ACT ACT ACT
surface mount YES YES NO YES YES YES NO YES
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form GULL WING GULL WING THROUGH-HOLE GULL WING GULL WING GULL WING THROUGH-HOLE GULL WING
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
length 5 mm 5 mm 19.18 mm 5 mm 10.2 mm 5 mm 19.18 mm 8.6235 mm
width 4.4 mm 4.4 mm 7.62 mm 4.4 mm 5.3 mm 4.4 mm 7.62 mm 3.9 mm
Is it Rohs certified? - conform to conform to - conform to conform to conform to conform to
Maker - Fairchild Fairchild - Fairchild Fairchild Fairchild Fairchild
Parts packaging code - TSSOP DIP - SOP TSSOP DIP SOIC
package instruction - TSSOP, TSSOP14,.25 DIP, DIP14,.3 - SOP, SOP14,.3 TSSOP, TSSOP14,.25 DIP, DIP14,.3 SOP, SOP14,.25
Contacts - 14 14 - 14 14 14 14
Reach Compliance Code - compli unknow - compli compli compli compli
JESD-30 code - R-PDSO-G14 R-PDIP-T14 - R-PDSO-G14 R-PDSO-G14 R-PDIP-T14 R-PDSO-G14
JESD-609 code - e3 - - e3 e3 e3 e3
Load capacitance (CL) - 50 pF 50 pF - 50 pF 50 pF 50 pF 50 pF
Logic integrated circuit type - AND GATE AND GATE - AND GATE AND GATE AND GATE AND GATE
MaximumI(ol) - 0.012 A 0.012 A - 0.012 A 0.024 A 0.024 A 0.024 A
Number of entries - 2 2 - 2 2 2 2
Package body material - PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - TSSOP DIP - SOP TSSOP DIP SOP
Encapsulate equivalent code - TSSOP14,.25 DIP14,.3 - SOP14,.3 TSSOP14,.25 DIP14,.3 SOP14,.25
Package shape - RECTANGULAR RECTANGULAR - RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form - SMALL OUTLINE, THIN PROFILE, SHRINK PITCH IN-LINE - SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH IN-LINE SMALL OUTLINE
method of packing - TAPE AND REEL RAIL - TAPE AND REEL TAPE AND REEL RAIL TAPE AND REEL
Peak Reflow Temperature (Celsius) - 260 - - 260 260 NOT APPLICABLE 260
power supply - 3.3/5 V 3.3/5 V - 3.3/5 V 5 V 5 V 5 V
Prop。Delay @ Nom-Su - 10 ns 10 ns - 10 ns 10 ns 10 ns 10 ns
propagation delay (tpd) - 10 ns 10 ns - 10 ns 10 ns 10 ns 10 ns
Certification status - Not Qualified Not Qualified - Not Qualified Not Qualified Not Qualified Not Qualified
Schmitt trigger - NO NO - NO NO NO NO
Maximum seat height - 1.2 mm 5.08 mm - 2.1 mm 1.2 mm 5.08 mm 1.753 mm
Maximum supply voltage (Vsup) - 6 V 6 V - 6 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) - 2 V 2 V - 2 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) - 3.3 V 3.3 V - 3.3 V 5 V 5 V 5 V
technology - CMOS CMOS - CMOS CMOS CMOS CMOS
Terminal surface - Matte Tin (Sn) - - Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn) MATTE TIN
Terminal pitch - 0.65 mm 2.54 mm - 1.27 mm 0.65 mm 2.54 mm 1.27 mm
Maximum time at peak reflow temperature - NOT SPECIFIED - - NOT SPECIFIED NOT SPECIFIED NOT APPLICABLE NOT SPECIFIED
Base Number Matches - 1 1 - 1 1 1 1

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