EEWORLDEEWORLDEEWORLD

Part Number

Search

74F673A

Description
F/FAST SERIES, 16-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24
Categorysemiconductor    logic   
File Size67KB,7 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric Compare View All

74F673A Overview

F/FAST SERIES, 16-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24

74F673A Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals24
Maximum operating temperature70 Cel
Minimum operating temperature0.0 Cel
Maximum supply/operating voltage5.5 V
Minimum supply/operating voltage4.5 V
Rated supply voltage5 V
Processing package description0.600 INCH, SLIM, PLASTIC, MS-011, DIP-24
Lead-freeYes
EU RoHS regulationsYes
stateACTIVE
CraftsmanshipTTL
packaging shapeRECTANGULAR
Package SizeIN-LINE
Terminal formTHROUGH-HOLE
Terminal spacing2.54 mm
terminal coatingMATTE TIN
Terminal locationDUAL
Packaging MaterialsPLASTIC/EPOXY
Temperature levelCOMMERCIAL
seriesF/FAST
Logic IC typeSERIAL IN PARALLEL OUT
Number of digits16
Output polarityTRUE
propagation delay TPD12 ns
Shift directionRIGHT
Trigger typeNEGATIVE EDGE
Max-Min frequency85 MHz
74F673A 16-Bit Serial-In, Serial/Parallel-Out Shift Register
April 1988
Revised August 1999
74F673A
16-Bit Serial-In, Serial/Parallel-Out Shift Register
General Description
The 74F673A contains a 16-bit serial-in, serial-out shift
register and a 16-bit Parallel-Out storage register. A single
pin serves either as an input for serial entry or as a 3-
STATE serial output. In the Serial-Out mode, the data recir-
culates in the shift register. By means of a separate clock,
the contents of the shift register are transferred to the stor-
age register for parallel outputting. The contents of the stor-
age register can also be parallel loaded back into the shift
register. A HIGH signal on the Chip Select input prevents
both shifting and parallel transfer. The storage register may
be cleared via STMR.
Features
s
Serial-to-parallel converter
s
16-bit serial I/O shift register
s
16-bit parallel-out storage register
s
Recirculating serial shifting
s
Recirculating parallel transfer
s
Common serial data I/O pin
s
Slim 24 lead package
Ordering Code:
Order Number
74F673ASC
74F673APC
74F673ASPC
Package Number
M24B
N24A
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
© 1999 Fairchild Semiconductor Corporation
DS009585
www.fairchildsemi.com

74F673A Related Products

74F673A 74F673APC 74F673ASC 74F673ASPC
Description F/FAST SERIES, 16-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24 F/FAST SERIES, 16-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24 F/FAST SERIES, 16-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24 F/FAST SERIES, 16-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24
Number of functions 1 1 1 1
Number of terminals 24 24 24 24
Maximum operating temperature 70 Cel 70 °C 70 °C 70 °C
Terminal form THROUGH-HOLE THROUGH-HOLE GULL WING THROUGH-HOLE
Terminal location DUAL DUAL DUAL DUAL
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
series F/FAST F/FAST F/FAST F/FAST
Number of digits 16 16 16 16
Output polarity TRUE TRUE TRUE TRUE
Trigger type NEGATIVE EDGE NEGATIVE EDGE NEGATIVE EDGE NEGATIVE EDGE
Is it Rohs certified? - conform to conform to conform to
Maker - Fairchild Fairchild Fairchild
Parts packaging code - DIP SOIC DIP
package instruction - 0.600 INCH, SLIM, PLASTIC, MS-011, DIP-24 0.300 INCH, PLASTIC, MS-013, SOIC-24 DIP, DIP24,.3
Contacts - 24 24 24
Reach Compliance Code - compli compliant compli
Other features - PARALLEL OUTPUT IS REGISTERED PARALLEL OUTPUT IS REGISTERED PARALLEL OUTPUT IS REGISTERED
Counting direction - RIGHT RIGHT RIGHT
JESD-30 code - R-PDIP-T24 R-PDSO-G24 R-PDIP-T24
JESD-609 code - e3 e3 e3
length - 31.915 mm 15.4 mm 31.915 mm
Load capacitance (CL) - 50 pF 50 pF 50 pF
Logic integrated circuit type - SERIAL IN PARALLEL OUT SERIAL IN PARALLEL OUT SERIAL IN PARALLEL OUT
Package body material - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - DIP SOP DIP
Encapsulate equivalent code - DIP24,.6 SOP24,.4 DIP24,.3
Package shape - RECTANGULAR RECTANGULAR RECTANGULAR
Package form - IN-LINE SMALL OUTLINE IN-LINE
Peak Reflow Temperature (Celsius) - NOT SPECIFIED 260 NOT SPECIFIED
power supply - 5 V 5 V 5 V
Maximum supply current (ICC) - 172 mA 172 mA 172 mA
propagation delay (tpd) - 12 ns 12 ns 12 ns
Certification status - Not Qualified Not Qualified Not Qualified
Maximum seat height - 5.334 mm 2.65 mm 5.08 mm
Maximum supply voltage (Vsup) - 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) - 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) - 5 V 5 V 5 V
surface mount - NO YES NO
technology - TTL TTL TTL
Terminal surface - Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn)
Terminal pitch - 2.54 mm 1.27 mm 2.54 mm
Maximum time at peak reflow temperature - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width - 15.24 mm 7.5 mm 7.62 mm
minfmax - 85 MHz 85 MHz 85 MHz
Base Number Matches - 1 1 1
LPD1109
#include#define uchar unsigned char sbit Data_in=P1^0; sbit Data_clk=P1^1;void DELAY_xus(uchar dd) {while(dd--); }void Send_Begin(void)//发同步帧 {uchar i,PUB_Flage;Data_clk=0;Data_in =1;DELAY_xus(1);Data...
suzhiqiang168 51mcu
Does anyone know what these disassembly instructions generated by the IAR compiler are?
is the thing similar to the function name in the picture. Use the / operation and the left shift 4 operation to view the disassembly trace here. What are these?...
as564335sa Microcontroller MCU
12-bit AD Chinese pdf data---MAX187
[i=s] This post was last edited by paulhyde on 2014-9-15 09:05 [/i] Chinese information, this is a 12-bit AD, 8 pins, easy to use for beginners, suitable for measurement fields. . High precision...
zhengzhoutie Electronics Design Contest
[RISC-V MCU CH32V103 Review] USB flash drive read and write test
[i=s]This post was last edited by jennyzhaojie on 2021-3-8 22:13[/i]The CH32V103 development board is equipped with two different types of USB interfaces, one for program download and debugging, and t...
jennyzhaojie Domestic Chip Exchange
The problem of porting ucos to 51, the compilation passed, but it cannot be debugged? ? ?
Dear experts and seniors: I have a problem that has been bothering me for a while. I am porting ucos to 51 recently. Some files related to the porting are written according to the requirements in the ...
lzjcjwl Real-time operating system RTOS
NI Special Month, enjoy up to 40% off on software and more!
NI special month, buy software and more products, enjoy up to 40% off!NI provides a variety of shopping channels to give you a more convenient shopping experience. You can purchase discounted products...
eric_wang Integrated technical exchanges

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2151  253  1557  2800  2076  44  6  32  57  42 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号