74LCX240 datasheet, PDF - EEWORLD Datasheet

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74LCX240: DescriptionDual 4-Bit Inverting Buffer/Driver; File Size116KB，10 Pages; ManufacturerFairchild; Websitehttp://www.fairchildsemi.com/

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74LCX240 Overview

Dual 4-Bit Inverting Buffer/Driver

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74LCX240 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs

February 1994

Revised March 2005

74LCX240

Low Voltage Octal Buffer/Line Driver with

5V Tolerant Inputs and Outputs

General Description

The LCX240 is an inverting octal buffer and line driver

designed to be employed as a memory address driver,

clock driver and bus oriented transmitter or receiver. The

device is designed for low voltage (2.5V or 3.3V) V

appli-

cations with capability of interfacing to a 5V signal environ-

ment.

The LCX240 is fabricated with an advanced CMOS tech-

nology to achieve high speed operation while maintaining

CMOS low power dissipation.

Features

5V tolerant inputs and outputs

2.3V–3.6V V

specifications provided

6.5 ns t

max (V

3.3V), 10

A I

max

Power-down high impedance inputs and outputs

Supports live insertion/withdrawal (Note 1)

24 mA output drive (V

3.0V)

Implements patented noise/EMI reduction circuitry

Latch-up performance exceeds 500 mA

ESD performance:

Human body model

2000V

Machine model

200V

Note 1:

To ensure the high-impedance state during power up or down, OE

should be tied to V

through a pull-up resistor: the minimum value or the

resistor is determined by the current-sourcing capability of the driver.

Ordering Code:

Order Number

74LCX240WM

74LCX240SJ

74LCX240MSA

74LCX240MTC

74LCX240MTCX_NL

(Note 2)

Package

Number

M20B

M20D

MSA20

MTC20

Package Description

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Note 2:

“_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.

Logic Diagram

Connection Diagram

DS011993

www.fairchildsemi.com

74LCX240 Related Products

	74LCX240	74LCX240MSAX	74LCX240MTC	3547S-1AE-103	74LCX240SJX	74LCX240WMX
Description	Dual 4-Bit Inverting Buffer/Driver	Dual 4-Bit Inverting Buffer/Driver	LVC/LCX/Z SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20	3-Turn Precision Potentiometer	Dual 4-Bit Inverting Buffer/Driver	Dual 4-Bit Inverting Buffer/Driver
Brand Name	-	Fairchild Semiconduc	Fairchild Semiconduc	-	Fairchild Semiconductor	Fairchild Semiconduc
Is it lead-free?	-	Lead free	Lead free	-	Lead free	Lead free
Is it Rohs certified?	-	conform to	conform to	-	conform to	conform to
Maker	-	Fairchild	Fairchild	-	Fairchild	Fairchild
Parts packaging code	-	SSOP	TSSOP	-	SOP	SOIC
package instruction	-	SSOP, SSOP20,.3	TSSOP, TSSOP20,.25	-	SOP, SOP20,.3	SOP, SOP20,.4
Contacts	-	20	20	-	20	20
Manufacturer packaging code	-	20LD, SSOP, JEDEC MO-150, 5.3MM WIDE	20LD, TSSOP, JEDEC MO-153, 4.4MM WIDE	-	20LD,SOP,EIAJ TYPE II, 5.3MM WIDE	20LD, SOIC, JEDEC MS013, .300\", WIDE BODY
Reach Compliance Code	-	compli	compli	-	compliant	compli
ECCN code	-	EAR99	EAR99	-	EAR99	EAR99
Control type	-	ENABLE LOW	ENABLE LOW	-	ENABLE LOW	ENABLE LOW
series	-	LVC/LCX/Z	LVC/LCX/Z	-	LVC/LCX/Z	LVC/LCX/Z
JESD-30 code	-	R-PDSO-G20	R-PDSO-G20	-	R-PDSO-G20	R-PDSO-G20
JESD-609 code	-	e3	e4	-	e3	e3
length	-	7.2 mm	6.5 mm	-	12.6 mm	12.8 mm
Load capacitance (CL)	-	50 pF	50 pF	-	50 pF	50 pF
Logic integrated circuit type	-	BUS DRIVER	BUS DRIVER	-	BUS DRIVER	BUS DRIVER
MaximumI(ol)	-	0.024 A	0.024 A	-	0.024 A	0.024 A
Humidity sensitivity level	-	1	1	-	1	1
Number of digits	-	4	4	-	4	4
Number of functions	-	2	2	-	2	2
Number of ports	-	2	2	-	2	2
Number of terminals	-	20	20	-	20	20
Maximum operating temperature	-	85 °C	85 °C	-	85 °C	85 °C
Minimum operating temperature	-	-40 °C	-40 °C	-	-40 °C	-40 °C
Output characteristics	-	3-STATE	3-STATE	-	3-STATE	3-STATE
Output polarity	-	INVERTED	INVERTED	-	INVERTED	INVERTED
Package body material	-	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	-	SSOP	TSSOP	-	SOP	SOP
Encapsulate equivalent code	-	SSOP20,.3	TSSOP20,.25	-	SOP20,.3	SOP20,.4
Package shape	-	RECTANGULAR	RECTANGULAR	-	RECTANGULAR	RECTANGULAR
Package form	-	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	-	SMALL OUTLINE	SMALL OUTLINE
method of packing	-	TAPE AND REEL	RAIL	-	TAPE AND REEL	TAPE AND REEL
Peak Reflow Temperature (Celsius)	-	260	260	-	260	260
power supply	-	3.3 V	3.3 V	-	3.3 V	3.3 V
propagation delay (tpd)	-	7.8 ns	7.8 ns	-	7.8 ns	7.8 ns
Certification status	-	Not Qualified	Not Qualified	-	Not Qualified	Not Qualified
Maximum seat height	-	2.05 mm	1.2 mm	-	2.1 mm	2.65 mm
Maximum supply voltage (Vsup)	-	3.6 V	3.6 V	-	3.6 V	3.6 V
Minimum supply voltage (Vsup)	-	2 V	2 V	-	2 V	2 V
Nominal supply voltage (Vsup)	-	2.5 V	2.5 V	-	2.5 V	2.5 V
surface mount	-	YES	YES	-	YES	YES
technology	-	CMOS	CMOS	-	CMOS	CMOS
Temperature level	-	INDUSTRIAL	INDUSTRIAL	-	INDUSTRIAL	INDUSTRIAL
Terminal surface	-	Matte Tin (Sn)	Nickel/Palladium/Gold (Ni/Pd/Au)	-	Matte Tin (Sn)	Matte Tin (Sn)
Terminal form	-	GULL WING	GULL WING	-	GULL WING	GULL WING
Terminal pitch	-	0.65 mm	0.65 mm	-	1.27 mm	1.27 mm
Terminal location	-	DUAL	DUAL	-	DUAL	DUAL
Maximum time at peak reflow temperature	-	NOT SPECIFIED	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED
width	-	5.3 mm	4.4 mm	-	5.3 mm	7.5 mm
Base Number Matches	-	1	1	-	1	1

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