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74LCXZ16240MEA

Description
Low Voltage 16-Bit Inverting Buffer/Line Driver with 5V Tolerant Inputs/Outputs (Preliminary)
Categorylogic    logic   
File Size79KB,8 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric Compare View All

74LCXZ16240MEA Overview

Low Voltage 16-Bit Inverting Buffer/Line Driver with 5V Tolerant Inputs/Outputs (Preliminary)

74LCXZ16240MEA Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerFairchild
Parts packaging codeSSOP
package instructionSSOP, SSOP48,.4
Contacts48
Reach Compliance Codecompli
Other features5V TOLERANT INPUTS AND OUTPUTS
Control typeENABLE LOW
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G48
JESD-609 codee0
length15.875 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeBUS DRIVER
MaximumI(ol)0.024 A
Number of digits4
Number of functions4
Number of ports2
Number of terminals48
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityINVERTED
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Encapsulate equivalent codeSSOP48,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Prop。Delay @ Nom-Su4.5 ns
propagation delay (tpd)5.3 ns
Certification statusNot Qualified
Maximum seat height2.74 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.495 mm
Preliminary
74LCXZ16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 5V Tolerant Inputs/Outputs (Preliminary)
February 2000
Revised February 2000
74LCXZ16240
Low Voltage 16-Bit Inverting Buffer/Line Driver with
5V Tolerant Inputs/Outputs (Preliminary)
General Description
The LCXZ16240 contains sixteen inverting buffers with 3-
STATE outputs designed to be employed as a memory and
address driver, clock driver, or bus-oriented transmitter/
receiver. The device is nibble controlled. Each nibble has
separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
When V
CC
is between 0 and 1.5V, the LCXZ16240 is in the
high impedance state during power up or power down. This
places the outputs in the high impedance (Z) state prevent-
ing intermittent low impedance loading or glitching in bus
oriented applications.
The LCXZ16240 is designed for low voltage (2.7V or 3.3V)
V
CC
applications with capacity of interfacing to a 5V signal
environment.
The LCXZ16240 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
Guaranteed power up/down high impedance
s
Supports live insertion/withdrawal
s
2.7V–3.6V V
CC
specifications provided
s
4.5 ns t
PD
max (V
CC
=
3.3V), 20
µA
I
CC
max
s
±24
mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Ordering Code:
Order Number
74LCXZ16240MEA
74LCXZ16240MTD
Package Number
MS48A
MTD48
Package Description
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Symbol
Pin Descriptions
Pin Names
OE
n
I
0
–I
15
O
0
–O
15
Description
Output Enable Inputs (Active LOW)
Inputs
Outputs
© 2000 Fairchild Semiconductor Corporation
DS500257
www.fairchildsemi.com

74LCXZ16240MEA Related Products

74LCXZ16240MEA 74LCXZ16240MTD
Description Low Voltage 16-Bit Inverting Buffer/Line Driver with 5V Tolerant Inputs/Outputs (Preliminary) Low Voltage 16-Bit Inverting Buffer/Line Driver with 5V Tolerant Inputs/Outputs (Preliminary)
Is it Rohs certified? incompatible incompatible
Maker Fairchild Fairchild
Parts packaging code SSOP TSSOP
package instruction SSOP, SSOP48,.4 6.10 MM, MO-153, TSSOP-48
Contacts 48 48
Reach Compliance Code compli compli
Other features 5V TOLERANT INPUTS AND OUTPUTS 5V TOLERANT INPUTS AND OUTPUTS
Control type ENABLE LOW ENABLE LOW
series LVC/LCX/Z LVC/LCX/Z
JESD-30 code R-PDSO-G48 R-PDSO-G48
JESD-609 code e0 e0
length 15.875 mm 12.5 mm
Load capacitance (CL) 50 pF 50 pF
Logic integrated circuit type BUS DRIVER BUS DRIVER
MaximumI(ol) 0.024 A 0.024 A
Number of digits 4 4
Number of functions 4 4
Number of ports 2 2
Number of terminals 48 48
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Output characteristics 3-STATE 3-STATE
Output polarity INVERTED INVERTED
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SSOP TSSOP
Encapsulate equivalent code SSOP48,.4 TSSOP48,.3,20
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
power supply 3.3 V 3.3 V
Prop。Delay @ Nom-Su 4.5 ns 4.5 ns
propagation delay (tpd) 5.3 ns 5.3 ns
Certification status Not Qualified Not Qualified
Maximum seat height 2.74 mm 1.2 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V
Minimum supply voltage (Vsup) 2.7 V 2.7 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING GULL WING
Terminal pitch 0.635 mm 0.5 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
width 7.495 mm 6.1 mm
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