TS80C51RD2-LIED datasheet, PDF

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TS80C51RD2-LIED: DescriptionMicrocontroller, 8-Bit, 8051 CPU, 30MHz, CMOS, PQFP44, VQFP-44; CategoryThe embedded processor and controller Microcontrollers and processors; File Size690KB，74 Pages; ManufacturerTEMIC; Websitehttp://www.temic.de/

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TS80C51RD2-LIED Overview

Microcontroller, 8-Bit, 8051 CPU, 30MHz, CMOS, PQFP44, VQFP-44

TS80C51RD2-LIED Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
package instruction	QFP, QFP44,.5SQ,32
Reach Compliance Code	unknown
Has ADC	NO
Address bus width	16
bit size	8
CPU series	8051
maximum clock frequency	30 MHz
DAC channel	NO
DMA channel	NO
External data bus width	8
JESD-30 code	S-PQFP-G44
JESD-609 code	e0
Number of I/O lines	32
Number of terminals	44
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	QFP
Encapsulate equivalent code	QFP44,.5SQ,32
Package shape	SQUARE
Package form	FLATPACK
power supply	3/5 V
Certification status	Not Qualified
RAM (bytes)	1024
rom(word)	0
speed	30 MHz
Maximum slew rate	13 mA
Maximum supply voltage	6.05 V
Minimum supply voltage	2.43 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	QUAD
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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TS80C51RA2/RD2

TS83C51RB2/RC2/RD2

TS87C51RB2/RC2/RD2

High Performance 8-bit Microcontrollers

1. Description

Atmel Wireless & Microcontrollers TS80C51Rx2 is high

performance CMOS ROM, OTP, EPROM and ROMless

versions of the 80C51 CMOS single chip 8-bit

microcontroller.

The TS80C51Rx2 retains all features of the 80C51 with

extended ROM/EPROM capacity (16/32/64 Kbytes), 256

bytes of internal RAM, a 7-source , 4-level interrupt

system, an on-chip oscilator and three timer/counters.

In addition, the TS80C51Rx2 has a Programmable

Counter Array, an XRAM of 256 or 768 bytes, a

Hardware Watchdog Timer, a more versatile serial

channel that facilitates multiprocessor communication

(EUART) and a X2 speed improvement mechanism.

The fully static design of the TS80C51Rx2 allows to

reduce system power consumption by bringing the clock

frequency down to any value, even DC, without loss of

data.

The TS80C51Rx2 has 2 software-selectable modes of

reduced activity for further reduction in power

consumption. In the idle mode the CPU is frozen while

the timers, the serial port and the interrupt system are still

operating. In the power-down mode the RAM is saved

and all other functions are inoperative.

2. Features

•

80C52 Compatible

•

8051 pin and instruction compatible

•

Four 8-bit I/O ports

•

Three 16-bit timer/counters

•

256 bytes scratchpad RAM

•

High-Speed Architecture

•

40 MHz @ 5V, 30MHz @ 3V

•

X2 Speed Improvement capability (6 clocks/

machine cycle)

30 MHz @ 5V, 20 MHz @ 3V (Equivalent to

60 MHz @ 5V, 40 MHz @ 3V)

•

Dual Data Pointer

•

Hardware Watchdog Timer (One-time enabled with

Reset-Out)

•

2 extra 8-bit I/O ports available on RD2 with high

pin count packages

•

Asynchronous port reset

•

Interrupt Structure with

•

7 Interrupt sources,

•

4 level priority interrupt system

•

Full duplex Enhanced UART

•

Framing error detection

•

Automatic address recognition

•

Low EMI (inhibit ALE)

•

On-chip ROM/EPROM (16K-bytes, 32K-bytes, 64K-

bytes)

•

Power Control modes

•

Idle mode

•

Power-down mode

•

Power-off Flag

•

Once mode (On-chip Emulation)

•

On-chip eXpanded RAM (XRAM) (256 or 768 bytes)

•

Programmable Clock Out and Up/Down Timer/

Counter 2

•

Programmable Counter Array with

•

High Speed Output,

Compare / Capture,

Pulse Width Modulator,

Watchdog Timer Capabilities

•

Power supply: 4.5-5V, 2.7-5.5V

•

Temperature ranges: Commercial (0 to 70

C) and

Industrial (-40 to 85

•

Packages: PDIL40, PLCC44, VQFP44 1.4, CQPJ44

(window), CDIL40 (window), PLCC68, VQFP64

1.4, JLCC68 (window)

Rev. C - 06 March, 2001

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