MC3456
Dual Timing Circuit
The MC3456 dual timing circuit is a highly stable controller capable
of producing accurate time delays, or oscillation. Additional terminals
are provided for triggering or resetting if desired. In the time delay
mode of operation, the time is precisely controlled by one external
resistor and capacitor per timer. For astable operation as an oscillator,
the free running frequency and the duty cycle are both accurately
controlled with two external resistors and one capacitor per timer. The
circuit may be triggered and reset on falling waveforms, and the output
structure can source or sink up to 200 mA or drive MTTL circuits.
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DUAL TIMING CIRCUIT
SEMICONDUCTOR
TECHNICAL DATA
•
•
•
•
•
•
•
•
•
Direct Replacement for NE556/SE556 Timers
Timing from Microseconds through Hours
Operates in Both Astable and Monostable Modes
Adjustable Duty Cycle
High Current Output can Source or Sink 200 mA
Output can Drive MTTL
Temperature Stability of 0.005% per
°C
Normally “On” or Normally “Off” Output
Dual Version of the Popular MC1455 Timer
P SUFFIX
PLASTIC PACKAGE
CASE 646
1.0 k
MT2
3
10 k
5
0.01
μF
4
2
8
1/2
MC3456
1
6
7
1.0
μF
C
−10 V
t = 1.1; R and C = 22 sec
Time delay (t) is variable by
changing R and C (see Figure 16).
1N4740
3.5 k
250 V
R
20 M
G
MT1
Load
117 Vac/60 Hz
D SUFFIX
PLASTIC PACKAGE
CASE 751A
(SO−14)
0.1
μF
1N4003
−
10
μF
+
PIN CONNECTIONS
Discharge A
Threshold A
Control A
Reset A
Output A
Trigger A
Gnd
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
Discharge B
Threshold B
Control B
Reset B
Output B
Trigger B
Figure 1. 22 Second Solid State Time Delay Relay Circuit
(Top View)
ORDERING INFORMATION
Device
MC3456P
NE556D
Operating
Temperature Range
0° to +70°C
Package
Plastic DIP
SO−14
©
Semiconductor Components Industries, LLC, 2006
July, 2006
−
Rev. 4
1
Publication Order Number:
MC3456/D
MC3456
V
CC
14
2 (12)
Threshold
3 (11)
Control Voltage
5k
6 (8)
5k
7
Gnd
4 (10)
Reset
Test circuit for measuring DC parameters (to set output and
measure parameters):
a) When V
S
w
2/3 V
CC
, V
O
is low.
b) When V
S
v
1/3 V
CC
, V
O
is high.
c) When V
O
is low, Pin 7 sinks current. To test for Reset, set V
O
high,
c)
apply Reset voltage, and test for current flowing into Pin 7. When Reset
c)
is not in use, it should be tied to V
CC
.
+
Comp
−B
5k
+
Comp
A
−
Flip
R Flop
Q
S Inhibit/
Reset
5 (9)
Output
V
O
1 (13)
V
R
Discharge
+
0.01
μF
Reset
5
Control
Voltage
3
Output
I
Sink
I
Source
Gnd
1
2
4
8
V
CC
1/2
MC3456
7
Discharge
Threshold
6
Trigger
I
th
2.0 k
V
S
I
CC
700
V
CC
Trigger
Figure 2. Block Diagram
(1/2 Shown)
Figure 3. General Test Circuit
MAXIMUM RATINGS
(T
A
= +25°C, unless otherwise noted.)
Rating
Power Supply Voltage
Discharge Current
Power Dissipation (Package Limitation)
P Suffix, Plastic Package, Case 646
Derate above T
A
= +25°C
D Suffix, Plastic Package, Case 751
Derate above T
A
= +25°C
Operating Ambient Temperature Range
Storage Temperature Range
Symbol
V
CC
I
dis
P
D
Value
+18
200
625
5.0
1.0
8.0
0 to +70
Unit
Vdc
mA
mW
mW/°C
W
mW/°C
°C
°C
T
A
T
stg
−65
to +150
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2
MC3456
ELECTRICAL CHARACTERISTICS
(T
A
= +25°C, V
CC
= +15 V, unless otherwise noted.)
Characteristics
Supply Voltage
Supply Current
V
CC
= 5.0 V, R
L
=
∞
V
CC
= 15 V, R
L
=
∞
Low State, (Note 1)
Timing Error (Note 2)
Monostable Mode (R
A
= 2.0 kΩ; C = 0.1
μF)
Initial Accuracy
Drift with Temperature
Drift with Supply Voltage
Astable Mode (R
A
= R
B
= 2.0 kΩ to 100 kΩ; C = 0.01
μF)
Initial Accuracy
Drift with Temperature
Drift with Supply Voltage
Threshold Voltage
Trigger Voltage
V
CC
= 15 V
V
CC
= 5.0 V
Trigger Current
Reset Voltage
Reset Current
Threshold Current (Note 3)
Control Voltage Level
V
CC
= 15 V
V
CC
= 5.0 V
Output Voltage Low
(V
CC
= 15 V)
I
Sink
= 10 mA
I
Sink
= 50 mA
I
Sink
= 100 mA
I
Sink
= 200 mA
(V
CC
= 5.0 V)
I
Sink
= 5.0 mA
Output Voltage High
(I
Source
= 200 mA)
V
CC
= 15 V
(I
Source
= 100 mA)
V
CC
= 15 V
V
CC
= 5.0 V
Toggle Rate R
A
= 3.3 kΩ, R
B
= 6.8 kΩ, C = 0.003
μF
(Figure 17, 19)
Discharge Leakage Current
Rise Time of Output
Fall Time of Output
Matching Characteristics Between Sections
Monostable Mode
Initial Timing Accuracy
Timing Drift with Temperature
Drift with Supply Voltage
V
th
V
T
Symbol
V
CC
I
CC
Min
4.5
−
−
Typ
−
6.0
20
Max
16
12
30
Unit
V
mA
−
−
−
−
−
−
−
−
−
−
0.4
−
−
9.0
2.6
0.75
50
0.1
2.25
150
0.3
2/3
5.0
1.67
0.5
0.7
0.1
0.03
10
3.33
−
−
−
−
−
−
−
−
−
−
1.0
−
0.1
11
4.0
%
PPM/°C
%/V
%
PPM/°C
%/V
xV
CC
V
I
T
V
R
I
R
I
th
V
CL
μA
V
mA
μA
V
V
OL
−
−
−
−
−
V
OH
−
12.75
2.75
−
I
dis
t
OLH
t
OHL
−
−
−
−
12.5
13.3
3.3
100
20
100
100
−
−
−
−
100
−
−
0.1
0.4
2.0
2.5
0.25
0.25
0.75
2.75
−
0.35
V
V
kHz
nA
ns
ns
−
−
−
1.0
±10
0.2
2.0
−
0.5
%
ppm/°C
%/V
NOTES:
1. Supply current is typically 1.0 mA less for each output which is high.
2. Tested at V
CC
= 5.0 V and V
CC
= 15 V.
3. This will determine the maximum value of R
A
+ R
B
for 15 V operation. The maximum total R = 20 mΩ.
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3
MC3456
150
PW, PULSE WIDTH (ns MIN)
125
100
75
50
25
0
0
0.1
0.2
0.3
0.4
V
T (min)
, MINIMUM TRIGGER VOLTAGE (X V
CC
= Vdc)
0°C
25°C
70°C
ICC , SUPPLY CURRENT (mA)
10
25°C
8.0
6.0
4.0
2.0
0
5.0
10
V
CC
, SUPPLY VOLTAGE (Vdc)
15
Figure 4. Trigger Pulse Width
Figure 5. Supply Current
2.0
1.8
1.6
VCC −VOH (Vdc)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1.0
2.0
5.0
10
I
Source
(mA)
20
50
100
5.0 V
≤
V
CC
≤
15 V
25°C
10
25°C
1.0
VOL, (Vdc)
0.1
0.01
1.0
2.0
5.0
10
I
Sink
(mA)
20
50
100
Figure 6. High Output Voltage
Figure 7. Low Output Voltage
(@ V
CC
= 5.0 Vdc)
10
10
1.0
VOL, (Vdc)
25°C
0.1
VOL, (Vdc)
1.0
25°C
0.1
0.01
1.0
2.0
5.0
10
I
Sink
(mA)
20
50
100
0.01
1.0
2.0
5.0
10
I
Sink
(mA)
20
50
100
Figure 8. Low Output Voltage
(@ V
CC
= 10 Vdc)
Figure 9. Low Output Voltage
(@ V
CC
= 15 Vdc)
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4
MC3456
1.015
t d, DELAY TIME NORMALIZED
1.010
1.005
1.000
0.995
0.990
0.985
0
5.0
10
15
20
V
CC
, SUPPLY VOLTAGE (Vdc)
t d, DELAY TIME NORMALIZED
1.015
1.010
1.005
1.000
0.995
0.990
0.985
− 75
− 50
− 25
0
25
50
75
100
125
T
A
, AMBIENT TEMPERATURE (°C)
Figure 10. Delay Time versus Supply Voltage
Figure 11. Delay Time versus Temperature
300
t pd , PROPAGATION DELAY TIME (ns)
250
200
150
100
70°C
50
0
0
0.1
0.2
0.3
V
T (min)
, MINIMUM TRIGGER VOLTAGE (x V
CC
= Vdc)
0.4
0°C
25°C
Figure 12. Propagation Delay
versus Trigger Voltage
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