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805-RF315.0M-A

Description
RF SAW Filter for Remote Control
File Size171KB,2 Pages
ManufacturerOscilent
Websitehttp://www.oscilent.com
Download Datasheet View All

805-RF315.0M-A Overview

RF SAW Filter for Remote Control

RF SAW Filter
Part Number
Package
Application
Last Modified
805-RF315.0M-A
.
TYPE :
5.0 x 5.0 SMD
Remote Control
Mar. 10, 2007
RF SAW Filter for Remote Control
PART NUMBER :
805-RF315.0M-A
..
OPERATING CONDITIONS / ELECTRICAL CHARACTERISTICS
PARAMETERS
Center Frequency (Fo)
Insertion Loss
Stop Band Attenuation:
Condition
-
314.82 ~ 315.22 MHz ILmin
10.0 ~270.0 MHz
270.0 ~309.0 MHz
309.0 ~313.94 MHz
316.0 ~335.0 MHz
335.0 ~400.0 MHz
400.0 ~1000.0 MHz
Ripple in
Source Impedence (single ended)*
Load Impendance (single ended)*
DC Voltage
Passband (relative to llmin)
314.77 ~315.2 MHz
314.71 ~315.26 MHz
3dB Passband Width (relative to llmin)
Operating Temperature
* With Matching Network
-
-
-
-
-
-
0.8
-40
322.0 ~ 328.6 MHz-
-
-
-
Minimum
-
-
45
30
15
10
35
45
-
-
-
-
-
1.5
2.0
0.92
-
3.0
6.0
-
+105
dB
dB
MHz
ºC
Typical
315.0
2.0
55
35
20
15
45
55
0.8
50
50
-
Maximum
-
4.0
-
-
-
-
-
-
1.5
-
-
10
MHz
ohm
ohm
V
dB
Units
MHz
dB
.
PACKAGE OUTLINE
(mm)
PIN LAYOUT
A
B
C
D
E
F
G
H
In
Ground
Ground
Ground
Out
Ground
Ground
Ground
TEST FIXTURE
Can anyone explain why the value is set like this? Thank you!!! (marked in red)
#include "hall.h" unsigned char FaultF=0;//fault flagunsigned char Run_dir=1;//running direction, 0-1 oppositeunsigned char bHallStartStep; unsigned int OutPwmValue=0; unsigned char bHallSteps[2][8]={...
KCP stm32/stm8
Can G2553 accurately time to microseconds?
1. Can G2553 accurately time the device to the microsecond? What can I do? How to debug the precise timing problem of DS18B20???...
xiaohengyan Microcontroller MCU
Source synchronous timing issues
Many ASIC peripherals now use DDR (II) SDRAM (SRAM). Due to the high data transmission rate, data signals are basically source synchronous. Many timing materials believe that there is no length limit ...
eeleader FPGA/CPLD
Digitally controlled power supply using DSP for secondary voltage regulation
[[i] This post was last edited by lrz123 on 2011-10-25 10:48[/i]]...
lrz123 DIY/Open Source Hardware
About the digital tube display problem
I have been using FPGA to make a digital clock these days, using six digital tubes for display. I used a 20M crystal oscillator and divided it to get a 1KHZ signal, and used this signal to scan the bi...
gavin_8724 FPGA/CPLD

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