74V1T86S datasheet, PDF - EEWORLD Datasheet

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74V1T86S: DescriptionSINGLE EXCLUSIVE OR GATE; Categorylogic logic; File Size46KB，7 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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74V1T86S Overview

SINGLE EXCLUSIVE OR GATE

74V1T86S Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	STMicroelectronics
Parts packaging code	SOT-23
package instruction	SOT-23, 5 PIN
Contacts	5
Reach Compliance Code	_compli
Is Samacsys	N
series	74V
JESD-30 code	R-PDSO-G5
JESD-609 code	e0
length	2.9 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	XOR GATE
MaximumI(ol)	0.008 A
Number of functions	1
Number of entries	2
Number of terminals	5
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	PLASTIC/EPOXY
encapsulated code	LSSOP
Encapsulate equivalent code	TSOP5/6,.11,37
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Prop。Delay @ Nom-Su	9 ns
propagation delay (tpd)	9.5 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	1.45 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.95 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	1.625 mm
Base Number Matches	1

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74V1T86

SINGLE EXCLUSIVE OR GATE

HIGH SPEED: t

= 5 ns (TYP.) at V

= 5V

LOW POWER DISSIPATION:

= 1

µA

(MAX.) at T

= 25

COMPATIBLE WITH TTL OUTPUTS:

= 2V (MIN), V

= 0.8V (MAX)

POWER DOWN PROTECTION ON INPUTS &

OUTPUT

SYMMETRICAL OUTPUT IMPEDANCE:

| = I

= 8 mA (MIN)

BALANCED PROPAGATION DELAYS:

PLH

≅

PHL

OPERATING VOLTAGE RANGE:

(OPR) = 4.5V to 5.5V

IMPROVED LATCH-UP IMMUNITY

(SOT23-5L)

(SC-70)

ORDER CODE:

74V1T86S

74V1T86C

wiring C

MOS technology.

Power down protection is provided on all inputs

and 0 to 7V can be accepted on inputs with no

regard to the supply voltage. This device can be

used to interface 5V to 3V.

DESCRIPTION

The 74V1T86 is an advanced high-speed CMOS

SINGLE EXCLUSIVE OR GATE fabricated with

sub-micron silicon gate and double-layer metal

PIN CONNECTION AND IEC LOGIC SYMBOLS

October 1999

1/7

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