HCS109DMSR datasheet, PDF - EEWORLD Datasheet

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HCS109DMSR: DescriptionJ-Kbar Flip-Flop, HC/UH Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, CDIP16; Categorylogic logic; File Size225KB，9 Pages; ManufacturerHarris; Websitehttp://www.harris.com/

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HCS109DMSR Overview

J-Kbar Flip-Flop, HC/UH Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, CDIP16

HCS109DMSR Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
package instruction	DIP, DIP16,.3
Reach Compliance Code	unknown
Other features	RADIATION HARD CMOS/SILICON ON SAPPHIRE (SOS) TECHNOLOGY
series	HC/UH
JESD-30 code	R-CDIP-T16
JESD-609 code	e0
Load capacitance (CL)	50 pF
Logic integrated circuit type	J-KBAR FLIP-FLOP
MaximumI(ol)	0.00005 A
Number of digits	2
Number of functions	2
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output polarity	COMPLEMENTARY
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP16,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Prop。Delay @ Nom-Sup	35 ns
propagation delay (tpd)	35 ns
Certification status	Not Qualified
Filter level	38535V;38534K;883S
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
total dose	200k Rad(Si) V
Trigger type	POSITIVE EDGE
Base Number Matches	1

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	HCS109DMSR	5962R9578401V9A	5962R9578401VEC	5962R9578401VXC	HCS109KMSR	HCS109K/SAMPLE	HCS109D/SAMPLE
Description	J-Kbar Flip-Flop, HC/UH Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, CDIP16	J-Kbar Flip-Flop, HC/UH Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, DIE-16	J-Kbar Flip-Flop, HC/UH Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, CDIP16	J-Kbar Flip-Flop, HC/UH Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, CDFP16	J-Kbar Flip-Flop, HC/UH Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, CDFP16	J-Kbar Flip-Flop, HC/UH Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, CDFP16	J-Kbar Flip-Flop, HC/UH Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, CDIP16
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown
series	HC/UH	HC/UH	HC/UH	HC/UH	HC/UH	HC/UH	HC/UH
JESD-30 code	R-CDIP-T16	X-XUUC-N16	R-CDIP-T16	R-CDFP-F16	R-CDFP-F16	R-CDFP-F16	R-CDIP-T16
Load capacitance (CL)	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF
Logic integrated circuit type	J-KBAR FLIP-FLOP	J-KBAR FLIP-FLOP	J-KBAR FLIP-FLOP	J-KBAR FLIP-FLOP	J-KBAR FLIP-FLOP	J-KBAR FLIP-FLOP	J-KBAR FLIP-FLOP
Number of digits	2	2	2	2	2	2	2
Number of functions	2	2	2	2	2	2	2
Number of terminals	16	16	16	16	16	16	16
Output polarity	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY
Package body material	CERAMIC, METAL-SEALED COFIRED	UNSPECIFIED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
Package shape	RECTANGULAR	UNSPECIFIED	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	UNCASED CHIP	IN-LINE	FLATPACK	FLATPACK	FLATPACK	IN-LINE
propagation delay (tpd)	35 ns	35 ns	35 ns	35 ns	35 ns	35 ns	35 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	YES	NO	YES	YES	YES	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Terminal form	THROUGH-HOLE	NO LEAD	THROUGH-HOLE	FLAT	FLAT	FLAT	THROUGH-HOLE
Terminal location	DUAL	UPPER	DUAL	DUAL	DUAL	DUAL	DUAL
Trigger type	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
JESD-609 code	e0	e0	e4	e4	e0	-	-
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	-	-
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-	-
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	-	-
Terminal surface	Tin/Lead (Sn/Pb)	TIN LEAD	GOLD	GOLD	Tin/Lead (Sn/Pb)	-	-
total dose	200k Rad(Si) V	100k Rad(Si) V	100k Rad(Si) V	100k Rad(Si) V	200k Rad(Si) V	-	-
Base Number Matches	1	1	1	1	1	-	-

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