EP2600ETTTS-40.000M TR
EP26 00 ET T TS -40.000M TR
Series
Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS
(CMOS) 3.3Vdc 4 Pad 5.0mm x 7.0mm Ceramic
Surface Mount (SMD)
Frequency Tolerance/Stability
±100ppm Maximum
Operating Temperature Range
-40°C to +85°C
Packaging Options
Tape & Reel
Nominal Frequency
40.000MHz
Pin 1 Connection
Tri-State (Disabled Output: High Impedance)
Duty Cycle
50 ±5(%)
ELECTRICAL SPECIFICATIONS
Nominal Frequency
Frequency Tolerance/Stability
40.000MHz
±100ppm Maximum (Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the
Operating Temperature Range,Supply Voltage Change, Output Load Change, First Year Aging at 25°C,
Shock, and Vibration)
±5ppm/year Maximum
-40°C to +85°C
3.3Vdc ±0.3Vdc
28mA Maximum (Unloaded)
Vdd-0.4Vdc Minimum (IOH= -8mA)
0.4Vdc Maximum (IOL= +8mA)
4nSec Maximum (Measured at 20% to 80% of waveform)
50 ±5(%) (Measured at 50% of waveform)
30pF Maximum
CMOS
Tri-State (Disabled Output: High Impedance)
70% of Vdd Minimum to enable output, 20% of Vdd Maximum to disable output, No Connect to enable
output.
16mA Maximum (Pin 1 = Ground)
20µA Maximum (Pin 1 = Ground)
±125pSec Maximum, ±75pSec Typical
±40pSec Maximum
10mSec Maximum
-55°C to +125°C
Aging at 25°C
Operating Temperature Range
Supply Voltage
Input Current
Output Voltage Logic High (Voh)
Output Voltage Logic Low (Vol)
Rise/Fall Time
Duty Cycle
Load Drive Capability
Output Logic Type
Pin 1 Connection
Tri-State Input Voltage (Vih and Vil)
Disable Current
Standby Current
Absolute Clock Jitter
One Sigma Clock Period Jitter
Start Up Time
Storage Temperature Range
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS
ESD Susceptibility
Fine Leak Test
Flammability
Gross Leak Test
Mechanical Shock
Moisture Resistance
Moisture Sensitivity
Resistance to Soldering Heat
Resistance to Solvents
Solderability
Temperature Cycling
Vibration
MIL-STD-883, Method 3015, Class 1, HBM: 1500V
MIL-STD-883, Method 1014, Condition A
UL94-V0
MIL-STD-883, Method 1014, Condition C
MIL-STD-883, Method 2002, Condition B
MIL-STD-883, Method 1004
J-STD-020, MSL 1
MIL-STD-202, Method 210, Condition K
MIL-STD-202, Method 215
MIL-STD-883, Method 2003
MIL-STD-883, Method 1010, Condition B
MIL-STD-883, Method 2007, Condition A
www.ecliptek.com | Specification Subject to Change Without Notice | Revision G 08/07/2012 | Page 1 of 7
EP2600ETTTS-40.000M TR
Test Circuit for CMOS Output
Oscilloscope
Frequency
Counter
+
+
Power
Supply
_
+
Voltage
Meter
_
Current
Meter
_
Supply
Voltage
(V
DD
)
Probe
(Note 2)
Output
0.01µF
(Note 1)
0.1µF
(Note 1)
Ground
C
L
(Note 3)
Tri-State or
Power Down
Note 1: An external 0.01µF ceramic bypass capacitor in parallel with a 0.1µF high frequency ceramic bypass
capacitor close (less than 2mm) to the package ground and supply voltage pin is required.
Note 2: A low input capacitance (<12pF), 10X Attentuation Factor, High Impedance (>10Mohms), and
High bandwidth (>300MHz) passive probe is recommended.
Note 3: Capacitance value CL includes sum of all probe and fixture capacitance. See applicable specification sheet
for ‘Load Drive Capability’.
www.ecliptek.com | Specification Subject to Change Without Notice | Revision G 08/07/2012 | Page 4 of 7
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