ASM5I2309A-1H-16-TT datasheet, PDF

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ASM5I2309A-1H-16-TT: DescriptionPLL Based Clock Driver, 2309 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, TSSOP-16; Categorylogic logic; File Size152KB，14 Pages; ManufacturerALSC [Alliance Semiconductor Corporation]

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ASM5I2309A-1H-16-TT Overview

PLL Based Clock Driver, 2309 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, TSSOP-16

ASM5I2309A-1H-16-TT Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	TSSOP
package instruction	TSSOP, TSSOP16,.25
Contacts	16
Reach Compliance Code	unknown
series	2309
Input adjustment	STANDARD
JESD-30 code	R-PDSO-G16
JESD-609 code	e0
length	5 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER
MaximumI(ol)	0.012 A
Number of functions	1
Number of inverted outputs
Number of terminals	16
Actual output times	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP16,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
propagation delay (tpd)	0.35 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.25 ns
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	4.4 mm
minfmax	133 MHz
Base Number Matches	1

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August 2004

rev 2.0

3.3V Zero Delay Buffer

General Features



10 MHz to 133- MHz operating range, compatible

with CPU and PCI bus frequencies.

Zero input - output propagation delay.

Multiple low-skew outputs.



Output-output skew less than 250 ps.

Device-device skew less than 700 ps.

One input drives 9 outputs, grouped as 4 + 4

+ 1 (ASM5P2309A).

One input drives 5 outputs (ASM5P2305A).

ASMP5P2309A

ASMP5P2305A

133- MHz frequencies, and has higher drive than the -1

devices. All parts have on-chip PLL’s

that lock to an input

clock on the REF pin. The PLL feedback is on-chip and is

obtained from the CLKOUT pad.

The ASM5P2309A has two banks of four outputs each,

which can be controlled by the Select inputs as shown in

the Select Input Decoding Table. If all the output clocks are

not required, Bank B can be three-stated. The select input

also allows the input clock to be directly applied to the

outputs for chip and system testing purposes.

Multiple ASM5P2309A and ASM5P2305A devices can

accept the same input clock and distribute it. In this case

the skew between the outputs of the two devices is

guaranteed to be less than 700ps.

All outputs have less than 200 ps of cycle-to-cycle jitter.

0.35µ

CMOS

The input and output propagation delay is guaranteed to be

less than 250 ps, and the output to output skew is

guaranteed to be less than 250ps.

The ASM5P2309A and the ASM5P2305A are available in

two different configurations, as shown in the ordering

information table. The ASM5P23XXA-1 is the base part.

The ASM5P23XXA-1H is the high drive version of the -1

and its rise and fall times are much faster than -1 part.

packages

Less than 200 ps cycle-to-cycle jitter is compatible

with Pentium based systems.

Test Mode to bypass PLL (ASM5P2309A only,

refer Select Input Decoding Table).

Available in 16-pin, 150-mil SOIC, 4.4 mm

TSSOP,

and

150-mil

SSOP

(ASM5P2309A) or in 8-pin, 150- mil SOIC

package (ASM5P2305A).



3.3V

operation,

advanced

technology.

Functional Description

ASM5P2309A is a versatile, 3.3V zero-delay buffer

designed to distribute high-speed clocks. It accepts one

reference input and drives out nine low-skew clocks. It is

available in a 16-pin package. The ASM5P2305A is the

eight-pin version of the ASM5P2309A. It accepts one

reference input and drives out five low-skew clocks.

The -1H version of the ASM5P23XXA operates at up to

Block Diagram

REF

PLL

CLKOUT

REF

CLK1

PLL

MUX

CLKOUT

CLKA1

CLKA2

CLK2

CLK3

CLK4

Select Input

Decoding

CLKA3

CLKA4

CLKB1

CLKB2

CLKB3

CLKB4

ASM5P2305A

ASM5P2309A

Alliance Semiconductor

2575, Augustine Drive



Santa Clara, CA



Tel: 408.855.4900



Fax: 408.855.4999



www.alsc.com

Notice: The information in this document is subject to change without notice.

ASM5I2309A-1H-16-TT Related Products

	ASM5I2309A-1H-16-TT	ASM5I2309A-1-16-SR	ASM5P2309A-1-16-SR	ASM5P2309A-1-16-TT	ASM5P2305A-1H-08-SR	ASM5P2305A-1-08-SR	ASM5I2305A-1H-08-TR	ASM5P2305A-1H-08-TR	ASM5P2305A-1H-08-ST	ASM5P2309A-1H-16-SR
Description	PLL Based Clock Driver, 2309 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, TSSOP-16	PLL Based Clock Driver, 2309 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 0.150 INCH, SOIC-16	PLL Based Clock Driver, 2309 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 0.150 INCH, SOIC-16	PLL Based Clock Driver, 2309 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, TSSOP-16	PLL Based Clock Driver, 2305 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8	PLL Based Clock Driver, 2305 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8	PLL Based Clock Driver, 2305 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 4.40 MM, TSSOP-8	PLL Based Clock Driver, 2305 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 4.40 MM, TSSOP-8	PLL Based Clock Driver, 2305 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8	PLL Based Clock Driver, 2309 Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 0.150 INCH, SOIC-16
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	TSSOP	SOIC	SOIC	TSSOP	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC
package instruction	TSSOP, TSSOP16,.25	SOP, SOP16,.25	SOP, SOP16,.25	TSSOP, TSSOP16,.25	SOP, SOP8,.25	SOP, SOP8,.25	TSSOP, TSSOP8,.25	TSSOP, TSSOP8,.25	SOP, SOP8,.25	SOP, SOP16,.25
Contacts	16	16	16	16	8	8	8	8	8	16
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
series	2309	2309	2309	2309	2305	2305	2305	2305	2305	2309
Input adjustment	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD
JESD-30 code	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G16
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0	e0	e0
length	5 mm	9.905 mm	9.905 mm	5 mm	4.9 mm	4.9 mm	4.4 mm	4.4 mm	4.9 mm	9.905 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER
MaximumI(ol)	0.012 A	0.008 A	0.008 A	0.008 A	0.012 A	0.008 A	0.012 A	0.012 A	0.012 A	0.012 A
Number of functions	1	1	1	1	1	1	1	1	1	1
Number of terminals	16	16	16	16	8	8	8	8	8	16
Actual output times	8	8	8	8	4	4	4	4	4	8
Maximum operating temperature	85 °C	85 °C	70 °C	70 °C	70 °C	70 °C	85 °C	70 °C	70 °C	70 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	SOP	SOP	TSSOP	SOP	SOP	TSSOP	TSSOP	SOP	SOP
Encapsulate equivalent code	TSSOP16,.25	SOP16,.25	SOP16,.25	TSSOP16,.25	SOP8,.25	SOP8,.25	TSSOP8,.25	TSSOP8,.25	SOP8,.25	SOP16,.25
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
propagation delay (tpd)	0.35 ns	0.35 ns	0.35 ns	0.35 ns	0.35 ns	0.35 ns	0.35 ns	0.35 ns	0.35 ns	0.35 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.25 ns	0.25 ns	0.25 ns	0.25 ns	0.25 ns	0.25 ns	0.25 ns	0.25 ns	0.25 ns	0.25 ns
Maximum seat height	1.1 mm	1.75 mm	1.75 mm	1.1 mm	1.75 mm	1.75 mm	1.1 mm	1.1 mm	1.75 mm	1.75 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	1.27 mm	1.27 mm	0.65 mm	1.27 mm	1.27 mm	0.65 mm	0.65 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	4.4 mm	3.9 mm	3.9 mm	4.4 mm	3.9116 mm	3.9116 mm	3 mm	3 mm	3.9116 mm	3.9 mm
minfmax	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz
Base Number Matches	1	1	1	1	1	1	1	1	1	1

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