TTL / CMOS
AND
SINE WAVE •
CRYSTAL OSCILLATORS
TEMPERATURE-COMPENSATED XTAL OSCILLATORS
ACTX 1018 and ACVTX 1018 Series
FEATURES:
• Compatible with 14 Pin Dual in Line.
• Compact Size.
• Tight Stability Available.
• Low Current Consumption.
• Control Voltage Function.
• Low can height option.
APPLICATIONS:
• Cellular and Cordless Phones.
• Facsimile and Computer Control.
• Car Telephones.
• Communication Equipment
STANDARD SPECIFICATIONS
PARAMETERS
(F
o
)
Frequency Range
Operating Temperature (T
OPR
)
Storage Temperature
(T
STO
)
Frequency Stability -vs- 25°C
-vs- Temperature
-vs- Aging
-vs- Supply Voltage
Supply Voltage
(V
dd
)
Input Current
(I
dd
)
Duty Cycle or Symmetry
Rise and Fall Times
(T
R
/
T
F
)
Output Load
Output Voltage
(V
OH
)
(V
OL
)
Frequency Adjustment
(Internal Trimmer)
Vc and Freq. Pulling (V Series)
ACTX 1018 (A)
ACVTX1018 (A)
ACTX 1018 S
ACVTX1018S (A)
1 MHz - 26 MHz
8 MHz - 45 MHz
-10°C to + 60°C
(See Options / Table 1)
-40°C to + 85°C
± 0.5 ppm max
± 2.5 ppm max.
(See Options / Table 1)
± 1 ppm per year max.
± 0.5 ppm max.
5 Vdc ± 5% or 3.3 Vdc ± 5% (A Series)
_
20 mA max.
2 mA max. for F < 26 MHz
4 mA max. for F > 26 MHz
40 / 60% max.
N/A
10 ns max.
N/A
15 pF or 2 TT L
10 k
Ω
// 10 pF
0.9 * V
dd
min.
1 V
pp
min. Clipped Sine
0.4 V
dc
max.
0.7 Vpp min. (A Series)
± 3 ppm min.
0.5 V to 4.5 V or 0.3 V to 3.0 V (± 10 ppm min.)
Dimensions: Inches (mm)
For test circuit, waveforms, please see page 67.
Environmental and mechanical specifications on page 68, Group 4.
Marking, see p. 79.
0.024
(
o
0.6) ref.
/
ORDERING OPTIONS
AC X TX 1018 X X
Blank or V
Blank or S
Blank or A
-
Frequency - Temperature & Frequency Stability - Max. Can Height
H5 for 5.08 mm
NOTE:
Pin 1 may be present with no
connection function.
XX.XXXXX MHz
TABLE 1
FUNCTION
TEMPERATURE
RANGE
°C
Frequency - vs.- Temperature
± 0.5 ppm ± 1 ppm ± 1.5 ppm
max.
max.
max.
± 2 ppm
max.
± 2.5 ppm
max.
± 3 ppm
max.
± 5 ppm
max.
PIN #
1
7
8
14
Vc or N/A
GND / Case
Output
V
cc
0°C to + 50°C
-10°C to + 60°C
-20°C to + 70°C
- 30°Cto + 75°C
- 40°Cto + 85°C
C 05
C 10
D 10
C 15
D 15
C 20
D 20
E 20
F 20 (
*
)
C 25
Standard
E 25
F 25 (
*
)
ON
C 30
D 30
E 30
F 30 (
*
)
G 30 (
*
)
C 50
D 50
E 50
F 50 (
*
)
G 50 (
*
)
(
*
) D
EPENDING
ABRACON IS
ISO 9001 / QS 9000
CERTIFIED
NOTE: Left blank if standard
•
All specifications and markings subject to change without notice
F
REQUENCY
ABRACON
29 Journey • Aliso Viejo, CA 92656 • USA
(949) 448-7070
•
F
AX
: (949) 448-8484
E-
MAIL
:
abinfo
@
abracon.com •
I
NTERNET
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DDRESS
:
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®
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C O R P O R AT I O N
CRYSTAL OSCILLATORS
TECHNICAL TERMS
Nominal frequency:
The center or nominal output frequency of a
crystal oscillator.
Package:
Crystal oscillators are packaged in various styles from lead
through holes to surface-mount types. Various sizes and functions
are suitable for different applications.
Frequency tolerance:
The deviation from the nominal frequency in
terms of parts per millions (ppm) at room temperature. (25° ± 5°C)
Frequency range:
The frequency band that the oscillator type or
model can be offered.
Frequency stability:
The maximum allowable frequency deviation
compared to the measured frequency at 25 °C over the temperature
window, i.e., 0° C to +70° C. Typical stability is ± 0.01% ( ±100 ppm).
Operating temperature:
Temperature range within which output fre-
quency and other electrical, environmental characteristics meet the
specifications.
Aging:
The relative frequency change over a certain period of time.
This rate of change of frequency is normally exponential in character.
Typically, aging is ± 5ppm over 1 year maximum.
Storage Temperature:
The temperature range where the unit is
safely stored without damaging or changing the performance of the
unit.
Frequency vs. Power Supply Variation:
Maximum frequency
change allowed when the power supply voltage is changed within its
specified limits (typical ± 10% in VCC or ± 5% change).
Supply Voltage (Vdd max):
The maximum voltage which can safe-
ly be applied to the Vcc terminal with respect to ground. Maximum
supply voltage for TTL is 5.5V and for HCMOS is 7V.
Input Voltage (VIN):
The maximum voltage that can be safely applied
to any input terminal of the oscillator.
Output HIGH voltage (VOH):
The minimum voltage at an output of
the oscillator under proper loading.
Output LOW voltage (V0H):
The maximum voltage at an output of
the oscillator under proper loading.
Input HIGH voltage (VIH):
The minimum voltage to guarantee
threshold trigger at the input of the oscillator.
Input LOW voltage (VIL):
The maximum voltage to guarantee the
threshold trigger at the input of the oscillator.
Supply Current (lcc):
The current flowing into Vcc terminal with
respect to ground. Typical supply current is measured without load.
Symmetry or Duty Cycle:
The symmetry of the output waveform at
the specified level (at 1.4V for TTL, at 1/2 Vcc for HCMOS, or 1/2
waveform peak level for ECL).
SYM
= TH x 100 (%); See Fig. 1.
T
Fan Out:
The measure of driving ability of an oscillator, expressed
as the number of inputs that can be driven by a single output. It can
be represented by an equivalent load capacitance (CL) or a TTL load
circuit consisting of diodes, load resistor, and a capacitor.
Figure 1
Rise Time (Tr ):
Waveform rise time from Low to High transition,
measured at the specified level
10% to 90% for HCMOS,
20% to 80% for ECL
0.4 V to 2.4V for TTL.
Fall Time (Tf ):
The waveform fall time from High to Low transition,
measured at the specified level
90% to 10% for HCMOS,
80% to % for ECL
2.4V to 0.4V for TTL.
Jitter:
The modulation in phase or frequency of oscillator output.
HCMOS / TTL Compatible:
The oscillator is designed with ACMOS
logic with driving capability of TTL and HCMOS loads while main-
taining minimum logic HIGH of the HCMOS.
Tristate Enable:
When the input is left OPEN or tied to logic “1”, the
normal oscillation occurs. When the input is Grounded (tied to logic
“0”), the output is in HIGH IMPEDANCE state. The input has an
internal pull-up resistor thus allowing the input to be left open.
Output Logic:
The output of an oscillator is designed to meet vari-
ous specified logic states, such as TTL, HCMOS, ECL, Sine,
Clipped-Sine (DC cut).
Harmonic Distortion:
The non-linear distortion due to unwanted
harmonic spectrum component related with target signal frequency.
Each harmonic component is the ratio of electric power against
desired signal output electric power and is expressed in terms of
dBc, i.e. -20dBc. Harmonic distortion specification is important espe-
cially in sine output when a clean and less distorted signal is
required.
Phase Noise:
The measure of the short-term frequency
fluctuations of the oscillator. It is usually specified as the single side
band (SSB) power density in a 1Hz bandwidth at a specified offset
frequency from the carrier. It is measured in dBc/Hz.
Stand By:
A function that temporary turns off the oscillator and other
dividers to save power. Logic “0” will enable stand by mode. The dis-
able current at stand by mode varies from a few micro-amperes to
tens of micro-amperes (5µA typical). Because oscillation is halted,
there is a maximum of 10 ms (same amount of start-up time) before
output stabilizes.
ABRACON
- 56 -
®
C O R P O R AT I O N
29 Journey • Aliso Viejo, CA 92656 • USA
(949) 448-7070
•
F
AX
: (949) 448-8484
E-
MAIL
:
abinfo
@
abracon.com •
I
NTERNET
A
DDRESS
:
www.abracon.com
ABRACON IS
ISO 9001 / QS 9000
CERTIFIED
CRYSTAL OSCILLATORS
APPLICATION NOTES
CMOS RISE AND FALL TIMES
The rise and fall time on the CMOS technology depends on its
speed (CMOS, HCMOS, ACMOS, BICMOS), the supply voltage,
the load capacitance, and the load configuration. Typical rise and
fall time for CMOS 4000 series is 30ns, HCMOS is 6ns, and for
ACMOS (HCMOS, TTL compatible) is 3 ns max.
Typical rise and fall
time is measured
between 10% to 90%
of its waveform level.
(See example of
Wave Output; Fig. 1.)
OUTPUT
WAVEFORM
Figure 1
METHOD 1 :
Series termination
(Fig. 3)
R
S
DUT
Z
T
Figure 3
Rs > ZT - Ro
_
LOAD
In series termination, a damping resistor is placed close to the
source of the clock signal. Value of Rs must satisfy the following
requirement:
METHOD 2 :
Pull-Up / Pull-Down Resistors
(Fig. 4)
Vcc
ACMOS OUTPUT TERMINATION TECHNIQUES
Due to the fast transition time of the ACMOS (HCMOS/TTL com-
patible) device, proper termination techniques must be used
when testing or measuring electrical performance characteris-
tics.
Termination is usually used to solve the problem of voltage
reflection, which essential cause steps in clock waveforms as
well as overshoot and undershoot. Such effect could result in
false clocking of data, as well as higher EMI and system noise.
Overshoot
VoH
METHOD 3 :
VoL
Undershoot
Figure 2
Termination is required also because of the length of the trace on
the PC board and its load configuration.
There are three general methods of terminating a clock trace,
which is a process of matching the output impedance of the
device with the line impedance:
1) Series termination;
2) Pull-up/Pull-down termination;
3) Parallel-AC termination
DUT
ZT
R
1
R
2
LOAD
Figure 4
In pull-up/pull-down termination, the Thevenin’s equivalent of the
combination is equal to the characteristics impedance of the
trace. This is probably the cleanest, and results in no reflections,
as well as EMI.
RT ~ ZT
Parallel AC Termination
(Fig. 5)
ZT
DUT
C
c
C
L
LOAD
R
L
Figure 5
In parallel AC termination, a R-C combination is placed at the
load. The value of the capacitor must be chosen carefully, usual-
ly smaller than the 50pF. This termination is not recommended
because it will degrade the rise and fall time of the clock, al-
though it draws no DC current.
ABRACON IS
ISO 9001 / QS 9000
CERTIFIED
29 Journey • Aliso Viejo, CA 92656 • USA
(949) 448-7070
•
F
AX
: (949) 448-8484
E-
MAIL
:
abinfo
@
abracon.com •
I
NTERNET
A
DDRESS
:
www.abracon.com
ABRACON
®
- 57 -
C O R P O R AT I O N
CRYSTAL OSCILLATORS
QUESTIONS
AND
ANSWERS
• Typically, PLLs, Multiplier or Programmable designs pro-
duce higher jitter than the conventional fundamental design.
It is very important to understand the jitter requirements from the
application to specify the right specification for crystal oscillators.
We can classify two types of jitters:
• Cycle to cycle jitter
• Period jitter.
Q: Why the Overall frequency stability is specified in
crystal oscillators but not in crystals?
A: The crystal oscillator is typically used as a master clock for
the microprocessor and its parameters are not affected by the
internal characteristics of the microprocessor such as variation
in load capacitance and other variables that could affect the
change in frequency at room and over temperature. The over-
all frequency stability in crystal oscillators is typically ±100ppm
max. and includes frequency calibration at 25°C, over temper-
ature, frequency changes due to load, supply, aging, vibration,
and shock.
Q: What is the start-up time?
A: Start-up time is the delay time between the oscillation
starts from noise until it reaches its
full output amplitude when power is
applied. The supply voltage must be
applied with a defined rate or rise.
The start-up time varies from micro-
seconds to milliseconds depending
on frequency, ASIC speed and logic.
Please see figure 1.
Figure 1
CYCLE TO CYCLE JITTER
The Cycle to cycle jitter is the maximum difference in time
between several measured periods. Usually a minimum of ten
(10) cycles is used where T1 to T10 were recorded . See fig. 2.
Jitter =
Maximum Delta (Ts)
Figure 2
PERIOD JITTER.
The period jitter is the maximum change of a clock edge. It is
usually expressed as peak-to-peak jitter and can be converted to
rms value by multiplying to
(0.5) x (0.707). The period
jitter can only be measured
at each cycle but not multiple
cycles. See figure 3.
Typical jitter recorded in
Abracon oscillators varies
from 20ps to 60ps rms.
Q: What is Tristate Enable/Disable mode?
A: When the voltage at the control pin is set to a logic low “0”,
the output is in Tri-state mode that is High Impedance. The
disabled current is usually lower than its normal operating cur-
rent but not completely cut-off as it was seen in the Stand-by
mode, where the oscillation is shut down completely.
There is an internal pull-up resistor between control pin and
supply (typically 100kΩ), therefore the control pin can be left
open (floating) if unused.
Q: What is jitter and how to specify its maximum value?
A: Jitter is noise caused by many sources in crystal oscillators.
Major sources of noise are:
• Power supply noise.
• Integer multiples of the signal source frequency (harmonics).
• Load and termination conditions.
• Amplifier noise.
• Circuit configuration (PLLs, Multiplier, Overtone, etc.)
The following methods can be used to suppress the noise condi-
tions in the above sources:
• Make sure that the power supply noise is filtered by using
bypass capacitors, chip beads, or RC filters.
• If jitter is critical in some applications, especially for high-
frequencies noise, use low harmonics outputs or sine output.
• Make sure that load and termination conditions are opti-
mized to avoid reflected power back to its output.
Figure 3
Q: What is phase noise and how to measure it?
A: Phase noise is the expression of noise in the frequency
domain. It is a measure of the short-term frequency fluctua-
tions of the oscil-
lator. It is usually
specified as the
single sideband
power density in
a 1Hz bandwidth
at a specified offset fre-
Figure 4
quency from the carrier.
In order to measure phase noise, it is
necessary to pair a similar device-
under-test with one unit set a VCXO
and other set a fixed XO. Please see
block diagram in figure 4.
Typical phase noise in Abracon
VCXO and oscillators:
OFFSET
PHASE
FREQUENCY NOISE
(Hz)
(dBc/Hz)
10
100
1,000
10,000
100,000
-70
-110
-125
-150
-160
ABRACON
- 58 -
®
C O R P O R AT I O N
29 Journey • Aliso Viejo, CA 92656 • USA
(949) 448-7070
•
F
AX
: (949) 448-8484
E-
MAIL
:
abinfo
@
abracon.com •
I
NTERNET
A
DDRESS
:
www.abracon.com
ABRACON IS
ISO 9001 / QS 9000
CERTIFIED
VCXOs and TCXOs
QUESTIONS
AND
ANSWERS
Q: What is the control voltage?
A: The control voltage is the external voltage applied to the input
of the VCXO. It consists of a minimum, a maximum, and a
center voltage. The center control voltage is the nominal volt-
age that sets the oscillation frequency to its minimal value.
Standard control voltages:
Vc min = 0.5Vdc; Vc max. = 4.5Vdc; Vc center = 2.5Vdc ± 0.5V
Q: What are the factors that affect frequency pullability?
A: The frequency pullability or deviation in VCXO is the change in
the output frequency with respect to
change in control voltage.
Pullability is usually specified as min-
imum; however, in some applications,
a maximum pulling value is also
specified to avoid circuit instability.
Please refer to figure 1 for a typical
Colpitts VCXO circuit:
Figure 1
Some major factors that affect the frequency deviation in VCXO:
• Load capacitance value C1 and C2.
• Frequency.
• Crystal characteristics (C1, C0/C1, size)
• Varactor type and capacitance.
• Voltage control Vc.
• Operating temperature.
The frequency pullability can be increased either by using a
low capacitance with sharp slope varactor, connect in series
another varactor or an inductor, adjusting load capacitor val-
ues C1 and C2, or increasing control voltage.
Be very careful when considering any above methods because
it may create circuit instability which has a severe effect on jit-
ter, linearity, unwanted modes, frequency hysteresis, or fre-
quency shift over temperature.
Q: What is a TCXO?
A: A TCXO (Temperature-Compensated Crystal Oscillator) is a
crystal oscillator that has a high-precision crystal, a tempera-
ture-compensated network. There are several methods to
design a compensated network, which could vary from simple,
less expensive to, complicate and very expensive:
• Method 1:
Thermistor/Capacitor networks
(Direct compensation). Lowest cost, no varactor needed.
• Method 2:
Traditional thermistor network.
• Method 3:
Analog Polynomial Generator
• Method 4:
Digitally segmented analog
• Method 5:
Digital compensation
• Method 6:
Digital compensation with DAC voltage summers.
Figure 3
shows a
traditional
thermistor
network:
Figure 3
Q: What is the typical input impedance?
The input impedance is a function of modulation frequency. Its
minimum input impedance is 50kW at 10kHz.
Q: What is the transfer function?
A: The transfer function is the direction of change in frequency
versus the change in control voltage. Most applications
require a positive transfer function, which the frequency rises
when increasing control voltage.
Q: What is linearity and what are the factors that affect it?
A: Linearity is the deviation
from the best straight-
line slope of the
frequency versus control
voltage curve. The typi-
cal linearity in Abracon
VCXO is ±10% maxi-
mum for standard pulla-
bility. Larger pulling may
worsen the linearity.
Figure 2
Q: What is the modulation bandwidth?
A: The modulation bandwidth is the minimum ±3dB bandwidth
frequency, relative to a 1kHz to 10kHz modulation frequency.
Unless otherwise specified as default, other values of modula-
tion bandwidth and frequency must be specified when ordering.
Q: Why and when we need to use a TCXO?
A: We need to use a TCXO when the frequency stability of the
oscillator falls beyond the design limitation of a standard simple
(fixed) crystal oscillator which is typically less than ±5ppm over a
standard or extended temperature window. The TCXO costs
more due to its complex circuit and manufacturing.
Q: Why there is an internal trimmer or control voltage on a
TCXO?
A: The purpose of the internal trimmer (variable capacitor) or a
control voltage is to re-adjust the frequency to its nominal fre-
quency for aging compensation or initial setting.
The internal trimmer is accessible via a hole on top of the
TCXO can and can be adjusted with a special tool.
The control voltage can be set with a voltage divider or an
external voltage. Both methods of adjustment usually can not
produce large frequency deviation rather than 5 to 15ppm
enough to offset the frequency due to standard aging.
Q: How to specify frequency stability on a TCXO?
A: Unless otherwise specified, the frequency stability on a TCXO
is specified as follows:
•
Due to temperature change: ± 2.5ppm @ -20°C to +70°C
•
Due to aging: ± 1ppm per year max.
•
Due to supply voltage (±5%): ± 0.3ppm max.
The frequency drift due to temperature change is referred to nom-
inal frequency set at 25°C.
ABRACON IS
ISO 9001 / QS 9000
CERTIFIED
ABRACON
29 Journey • Aliso Viejo, CA 92656 • USA
(949) 448-7070
•
F
AX
: (949) 448-8484
E-
MAIL
:
abinfo
@
abracon.com •
I
NTERNET
A
DDRESS
:
www.abracon.com
®
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C O R P O R AT I O N
Analogue and Mixed Signal
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