CY7C331-35JCR datasheet, PDF - EEWORLD Datasheet

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CY7C331-35JCR: DescriptionOT PLD, 35ns, CMOS, PQCC28, PLASTIC, LCC-28; CategoryProgrammable logic devices Programmable logic; File Size424KB，13 Pages; ManufacturerCypress Semiconductor

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CY7C331-35JCR Overview

OT PLD, 35ns, CMOS, PQCC28, PLASTIC, LCC-28

CY7C331-35JCR Parametric

Parameter Name	Attribute value
Parts packaging code	QLCC
package instruction	QCCJ,
Contacts	28
Reach Compliance Code	unknown
Other features	ASYNCHRONOUS REGISTERED; 12 I/O MACROCELLS; VARIABLE PRODUCT TERMS
maximum clock frequency	17.5 MHz
JESD-30 code	S-PQCC-J28
length	11.5316 mm
Dedicated input times	12
Number of I/O lines	12
Number of terminals	28
Maximum operating temperature	70 °C
Minimum operating temperature
organize	12 DEDICATED INPUTS, 12 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Programmable logic type	OT PLD
propagation delay	35 ns
Certification status	Not Qualified
Maximum seat height	4.57 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
width	11.5316 mm
Base Number Matches	1

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CY7C331-35JCR Related Products

	CY7C331-35JCR	5962-8985502M3A	5962-9075401M3A	5962-8985501MXA	CY7C331-35JCT	5962-9075401MXA	5962-9075402MXA
Description	OT PLD, 35ns, CMOS, PQCC28, PLASTIC, LCC-28	OT PLD, 30ns, CMOS, CQCC28, CERAMIC, LCC-28	UV PLD, 40ns, CMOS, CQCC28, WINDOWED, CERAMIC, LCC-28	OT PLD, 40ns, CMOS, CDIP28, 0.300 INCH, CERDIP-28	OT PLD, 35ns, CMOS, PQCC28, PLASTIC, LCC-28	UV PLD, 40ns, CMOS, CDIP28, 0.300 INCH, WINDOWED, CERDIP-28	UV PLD, 30ns, CMOS, CDIP28, 0.300 INCH, WINDOWED, CERDIP-28
Parts packaging code	QLCC	QLCC	QLCC	DIP	QLCC	DIP	DIP
package instruction	QCCJ,	QCCN,	WQCCN,	DIP,	QCCJ,	WDIP,	WDIP,
Contacts	28	28	28	28	28	28	28
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown
Other features	ASYNCHRONOUS REGISTERED; 12 I/O MACROCELLS; VARIABLE PRODUCT TERMS	ASYNCHRONOUS REGISTERED; 12 I/O MACROCELLS; VARIABLE PRODUCT TERMS	ASYNCHRONOUS REGISTERED; 12 I/O MACROCELLS; VARIABLE PRODUCT TERMS	ASYNCHRONOUS REGISTERED; 12 I/O MACROCELLS; VARIABLE PRODUCT TERMS	ASYNCHRONOUS REGISTERED; 12 I/O MACROCELLS; VARIABLE PRODUCT TERMS	ASYNCHRONOUS REGISTERED; 12 I/O MACROCELLS; VARIABLE PRODUCT TERMS	ASYNCHRONOUS REGISTERED; 12 I/O MACROCELLS; VARIABLE PRODUCT TERMS
maximum clock frequency	17.5 MHz	18.1 MHz	14.2 MHz	14.2 MHz	17.5 MHz	14.2 MHz	18.1 MHz
JESD-30 code	S-PQCC-J28	S-CQCC-N28	S-CQCC-N28	R-GDIP-T28	S-PQCC-J28	R-GDIP-T28	R-GDIP-T28
length	11.5316 mm	11.43 mm	11.43 mm	37.0205 mm	11.5316 mm	37.0205 mm	37.0205 mm
Dedicated input times	12	12	12	12	12	12	12
Number of I/O lines	12	12	12	12	12	12	12
Number of terminals	28	28	28	28	28	28	28
Maximum operating temperature	70 °C	125 °C	125 °C	125 °C	70 °C	125 °C	125 °C
Minimum operating temperature	-	-55 °C	-55 °C	-55 °C	-	-55 °C	-55 °C
organize	12 DEDICATED INPUTS, 12 I/O	12 DEDICATED INPUTS, 12 I/O	12 DEDICATED INPUTS, 12 I/O	12 DEDICATED INPUTS, 12 I/O	12 DEDICATED INPUTS, 12 I/O	12 DEDICATED INPUTS, 12 I/O	12 DEDICATED INPUTS, 12 I/O
Output function	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL
Package body material	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, GLASS-SEALED	PLASTIC/EPOXY	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED
encapsulated code	QCCJ	QCCN	WQCCN	DIP	QCCJ	WDIP	WDIP
Package shape	SQUARE	SQUARE	SQUARE	RECTANGULAR	SQUARE	RECTANGULAR	RECTANGULAR
Package form	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER, WINDOW	IN-LINE	CHIP CARRIER	IN-LINE, WINDOW	IN-LINE, WINDOW
Programmable logic type	OT PLD	OT PLD	UV PLD	OT PLD	OT PLD	UV PLD	UV PLD
propagation delay	35 ns	30 ns	40 ns	40 ns	35 ns	40 ns	30 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	4.57 mm	1.9812 mm	2.8956 mm	5.08 mm	4.57 mm	5.08 mm	5.08 mm
Maximum supply voltage	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	NO	YES	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	MILITARY	MILITARY	MILITARY	COMMERCIAL	MILITARY	MILITARY
Terminal form	J BEND	NO LEAD	NO LEAD	THROUGH-HOLE	J BEND	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	2.54 mm	1.27 mm	2.54 mm	2.54 mm
Terminal location	QUAD	QUAD	QUAD	DUAL	QUAD	DUAL	DUAL
width	11.5316 mm	11.43 mm	11.43 mm	7.62 mm	11.5316 mm	7.62 mm	7.62 mm
Base Number Matches	1	1	1	1	1	-	-
ECCN code	-	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	-	3A001.A.2.C	3A001.A.2.C
JESD-609 code	-	e0	e0	e0	-	e0	e0
Filter level	-	MIL-STD-883	MIL-STD-883	MIL-STD-883	-	MIL-STD-883	MIL-STD-883
Terminal surface	-	TIN LEAD	TIN LEAD	TIN LEAD	-	TIN LEAD	TIN LEAD
Maker	-	-	Cypress Semiconductor	Cypress Semiconductor	-	Cypress Semiconductor	Cypress Semiconductor

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