203235A • Isolink Proprietary Information • Products and Product Information are Subject to Change Without Notice. • August 6, 2014
1
DATA SHEET • CLA SERIES: SILICON LIMITER DIODES AND CERAMIC HERMETIC PACKAGED DEVICES
Table 1. CLA Series Absolute Maximum Ratings
Parameter
Power dissipation
Symbol
P
DIS
Minimum
Typical
Maximum
Maximum T
J
Case Temp
Thermal Re sis tan ce
junction
to
case
Units
W
Reverse voltage
Forward current
Junction temperature
Storage temperature
Electrostatic discharge:
Charged Device Model (CDM), Class 4
Human Body Model (HBM), Class 1C
Machine Model (MM), Class A
Note:
V
R
I
F
T
J
T
STG
–65
–65
Minimum rated breakdown voltage
200
+175
+200
V
mA
C
C
1000
1000
150
V
V
V
Exposure to maximum rating conditions for extended periods may reduce device reliability. There is no damage to device with only one parameter set at the limit and all other
parameters set at or below their nominal value. Exceeding any of the limits listed here may result in permanent damage to the device.
CAUTION:
Although this device is designed to be as robust as possible, electrostatic discharge (ESD) can damage this device. This device
must be protected at all times from ESD. Static charges may easily produce potentials of several kilovolts on the human body
or equipment, which can discharge without detection. Industry-standard ESD precautions should be used at all times.
Table 2. CLA Series Electrical Specifications (1 of 2) (Notes 1 and 2)
203235A • Isolink Proprietary Information • Products and Product Information are Subject to Change Without Notice. • August 6, 2014
2
DATA SHEET • CLA SERIES: SILICON LIMITER DIODES AND CERAMIC HERMETIC PACKAGED DEVICES
Table 2. CLA Series Electrical Specifications (2 of 2) (Notes 1 and 2)
Total
Capacitance
(C
T
) @ 0 V
(pF)
Typical
0.45
0.45
0.45
0.45
0.45
0.45
0.45
0.45
0.45
0.45
0.45
0.45
0.85
0.85
0.85
0.85
0.51
0.51
0.51
0.51
0.38
0.38
0.38
0.38
Total
Capacitance
(C
T
) @ 6 V
(pF)
Maximum
0.30
0.40
0.40
0.35
0.35
0.40
0.40
0.35
0.35 @ 38 V
0.40 @ 38 V
0.40 @ 38 V
0.35 @ 38 V
0.75 @ 38 V
0.75 @ 38 V
0.70 @ 38 V
0.70 @ 38 V
0.40
0.45
0.40
0.40
0.40
0.45
0.40
0.40
Series
Resistance (RS)
@ 10 mA
(Ω)
Typical
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
1.0
1.0
1.0
1.0
1.7
1.7
1.7
1.7
Minority Carrier
Lifetime (TL) @
10 mA
(ns)
Typical
7
7
7
7
10
10
10
10
50
50
50
50
100
100
100
100
1175
1175
1175
1175
20
20
20
20
Thermal Resistance (θ)
(Note 3)
Average
(°C/W)
Maximum
100
90
150
150
110
100
160
106
70
60
120
120
45
35
100
100
45
35
100
100
182
81
152
163
Breakdown
Voltage (V)
Part Number
CLA4605-203
CLA4605-210
CLA4605-219
CLA4605-240
CLA4606-203
CLA4606-210
CLA4606-219
CLA4606-240
CLA4607-203
CLA4607-210
CLA4607-219
CLA4607-240
CLA4608-203
CLA4608-210
CLA4608-219
CLA4608-240
CLA4609-203
CLA4609-210
CLA4609-219
CLA4609-240
CLA4610-203
CLA4610-210
CLA4610-219
CLA4610-240
Min to Max
30 to 60
30 to 60
30 to 60
30 to 60
45 to 75
45 to 75
45 to 75
45 to 75
120 to 180
120 to 180
120 to 180
120 to 180
120 to 180
120 to 180
120 to 180
120 to 180
250 (Min)
250 (Min)
250 (Min)
250 (Min)
80 to 120
80 to 120
80 to 120
80 to 120
I Region
(μm)
Nominal
2.0
2.0
2.0
2.0
2.5
2.5
2.5
2.5
7.0
7.0
7.0
7.0
7.0
7.0
7.0
7.0
20.0
20.0
20.0
20.0
4.5
4.5
4.5
4.5
Note 1:
Performance is guaranteed only under the conditions listed in this table and is not guaranteed over the full operating or storage temperature ranges. Operation at elevated temperatures
may reduce reliability of the device.
Note 2:
T
OP
= +25
C,
CJ measured at 1 MHz, RS measured at 500 MHz, CW thermal resistance for infinite heat sink, unless otherwise noted.
Note 3:
Thermal resistance is calculated from the measured power dissipation @ f = 2.6 GHz, T
203235A • Isolink Proprietary Information • Products and Product Information are Subject to Change Without Notice. • August 6, 2014
3
DATA SHEET • CLA SERIES: SILICON LIMITER DIODES AND CERAMIC HERMETIC PACKAGED DEVICES
Table 3. Typical Performance @ 25
°C
@ 2.6 GHz, Z
0
= 50
Ω
(Note 1)
CW Input Power
for 1 dB
Insertion Loss
(dBm)
12
12
10
11
12
14
26
26
37
24
Maximum CW
Input Power
(dBm)
36
36
38
40
40
41
43
43
44
40
Maximum
Pulsed Input
Power
(dBm) (Note 2)
65
65
67
70
70
71
73
73
74
57
Output @
Maximum
Pulsed Input
(dBm) (Note 2)
21
24
22
24
27
27
39
44
50
32
Part Number
CLA4601
CLA4602
CLA4603
CLA4604
CLA4605
CLA4606
CLA4607
CLA4608
CLA4609
CLA4610
Insertion Loss
@ –10 dBm (dB)
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.2
0.3
0.1
Recovery Time
(ns) (Note 3)
5
5
5
5
5
5
5
5
5
5
Spike Leakage
(ergs) (Note 4)
Note 5
Note 5
Note 5
Note 5
0.08
0.03
0.21
0.15
25.77
Note 5
Note 1:
Diode chip is mounted on a 0.5 oz Cu PC board using 1 to 2 mils of conductive epoxy. Bond wire connections are made with 0.8 mil Au wire. Limiter configured with shunt connected
diode and 22 nH ground return and 100 pF DC blocking capacitors.
Note 2:
Pulsed power measurements taken at 1 μs pulse width, @ f = 10 KHz, and 0.1% duty cycle.
Note 3:
Recovery time represents the transition time from the high-loss state to the low-loss state following the removal of a high-power input. It is defined as the time from the end of the high-
power pulse to the time when insertion loss has returned to within 3 dB of the quiescent (low-power) state.
Note 4:
Spike Leakage (ergs) = t
s
x P
s
x 10
7
where t
s
is the spike width at the half-power point (in seconds) and P
S
is the maximum spike amplitude in watts.
Note 5:
Not detectable under current test conditions described in Note 2.
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