PCS5P9773G-52-ET datasheet, PDF

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PCS5P9773G-52-ET: Description2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer; CategoryThe embedded processor and controller Microcontrollers and processors; File Size619KB，16 Pages; ManufacturerPulseCore Semiconductor Corporation

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PCS5P9773G-52-ET Overview

2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer

PCS5P9773G-52-ET Parametric

Parameter Name	Attribute value
Maker	PulseCore Semiconductor Corporation
package instruction	1 MM HEIGHT, GREEN, TQFP-52
Reach Compliance Code	unknow
Other features	IT ALSO OPERATES WITH 3.3V SUPPLY
JESD-30 code	S-PQFP-G52
length	10 mm
Number of terminals	52
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Maximum output clock frequency	200 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	TQFP
Package shape	SQUARE
Package form	FLATPACK, THIN PROFILE
Master clock/crystal nominal frequency	200 MHz
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage	2.625 V
Minimum supply voltage	2.375 V
Nominal supply voltage	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
width	10 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER

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September 2006

rev 0.4

2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer

Features

•

Output frequency range: 8.33MHz to 200MHz

Input frequency range: 6.25MHz to 125MHz

2.5V or 3.3V operation

Split 2.5V / 3.3V outputs

±2%( max ) Output duty cycle variation

12 Clock outputs: drive up to 24 clock lines

One feedback output

Three reference clock inputs: LVPECL or

LVCMOS

•

300pS ( max ) output-output skew

Phase-locked loop (PLL) bypass mode

‘SpreadTrak’

Output enable/disable

Pin-compatible with CY29773, MPC9773 and

MPC973

•

Industrial temperature range: -40°C to +85°C

52pin 1.0mm TQFP package

RoHS Compliance

PCS5I9773

The ASM5I9773 features one LVPECL and two LVCMOS

reference clock inputs and provides 12 outputs partitioned

in three banks of four outputs each. Each bank divides the

VCO output per SEL(A:C) settings (see Table 2. Function

Table (Configuration Controls)). These dividers allow

output-to-input ratios of 8:1, 6:1, 5:1, 4:1, 3:1, 8:3, 5:2, 2:1,

5:3, 3:2, 4:3, 5:4, 1:1, and 5:6. Each LVCMOS-compatible

output can drive 50Ω series- or parallel-terminated

transmission lines. For series-terminated transmission

lines, each output can drive one or two traces, giving the

device an effective fanout of 1:24.

The PLL is ensured stable, given that the VCO is

configured to run between 200MHz to 500MHz. This allows

a wide range of output frequencies, from 8MHz to 200MHz.

For normal operation, the external feedback input FB_IN is

connected to the feedback output FB_OUT. The internal

VCO is running at multiples of the input reference clock set

by the feedback divider (see Table 1. Frequency Table).

When PLL_EN is LOW, PLL is bypassed and the reference

clock directly feeds the output dividers. This mode is fully

static and the minimum input clock frequency specification

Functional Description

The

ASM5I9773

low-voltage

high-performance

does not apply.

200MHz PLL-based zero delay buffer designed for high

speed clock distribution applications.

PulseCore Semiconductor Corporation

1715 S. Bascom Ave Suite 200, Campbell, CA 95008

•

Tel: 408-879-9077

•

Fax: 408-879-9018

www.pulsecoresemi.com

Notice: The information in this document is subject to change without notice.

PCS5P9773G-52-ET Related Products

	PCS5P9773G-52-ET	PCS5I9773G-52-ET	PCS5I9773G-52-ER	PCS5I9773
Description	2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer	2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer	2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer	2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer
Maker	PulseCore Semiconductor Corporation	PulseCore Semiconductor Corporation	PulseCore Semiconductor Corporation	-
package instruction	1 MM HEIGHT, GREEN, TQFP-52	1 MM HEIGHT, GREEN, TQFP-52	1 MM HEIGHT, GREEN, TQFP-52	-
Reach Compliance Code	unknow	unknow	unknow	-
Other features	IT ALSO OPERATES WITH 3.3V SUPPLY	IT ALSO OPERATES WITH 3.3V SUPPLY	IT ALSO OPERATES WITH 3.3V SUPPLY	-
JESD-30 code	S-PQFP-G52	S-PQFP-G52	S-PQFP-G52	-
length	10 mm	10 mm	10 mm	-
Number of terminals	52	52	52	-
Maximum operating temperature	85 °C	85 °C	85 °C	-
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-
Maximum output clock frequency	200 MHz	200 MHz	200 MHz	-
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-
encapsulated code	TQFP	TQFP	TQFP	-
Package shape	SQUARE	SQUARE	SQUARE	-
Package form	FLATPACK, THIN PROFILE	FLATPACK, THIN PROFILE	FLATPACK, THIN PROFILE	-
Master clock/crystal nominal frequency	200 MHz	200 MHz	200 MHz	-
Certification status	Not Qualified	Not Qualified	Not Qualified	-
Maximum seat height	1.2 mm	1.2 mm	1.2 mm	-
Maximum supply voltage	2.625 V	2.625 V	2.625 V	-
Minimum supply voltage	2.375 V	2.375 V	2.375 V	-
Nominal supply voltage	2.5 V	2.5 V	2.5 V	-
surface mount	YES	YES	YES	-
technology	CMOS	CMOS	CMOS	-
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	-
Terminal form	GULL WING	GULL WING	GULL WING	-
Terminal pitch	0.65 mm	0.65 mm	0.65 mm	-
Terminal location	QUAD	QUAD	QUAD	-
width	10 mm	10 mm	10 mm	-
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	-

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