5962-8982302MXX datasheet, PDF

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5962-8982302MXX: DescriptionField Programmable Gate Array, 320 CLBs, 5000 Gates, 70MHz, CMOS, CPGA175, CERAMIC, PGA-175; CategoryProgrammable logic devices Programmable logic; File Size451KB，17 Pages; ManufacturerXILINX; Websitehttps://www.xilinx.com/

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5962-8982302MXX Overview

Field Programmable Gate Array, 320 CLBs, 5000 Gates, 70MHz, CMOS, CPGA175, CERAMIC, PGA-175

5962-8982302MXX Parametric

Parameter Name	Attribute value
Maker	XILINX
Parts packaging code	PGA
package instruction	PGA,
Contacts	175
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
maximum clock frequency	70 MHz
Combined latency of CLB-Max	2 ns
JESD-30 code	S-CPGA-P175
JESD-609 code	e4
length	42.164 mm
Configurable number of logic blocks	320
Equivalent number of gates	5000
Number of terminals	175
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	320 CLBS, 5000 GATES
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Package shape	SQUARE
Package form	GRID ARRAY
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Filter level	MIL-STD-883
Maximum seat height	4.318 mm
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	GOLD
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
width	42.164 mm
Base Number Matches	1

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5962-8982302MXX Related Products

	5962-8982302MXX	5962-8982301MXX	5962-8982301XX	5962-8982302XX
Description	Field Programmable Gate Array, 320 CLBs, 5000 Gates, 70MHz, CMOS, CPGA175, CERAMIC, PGA-175	Field Programmable Gate Array, 320 CLBs, 9000 Gates, 50MHz, CMOS, CPGA175	Field Programmable Gate Array, 320 CLBs, 9000 Gates, 16MHz, CMOS, CPGA175, CERAMIC, PGA-175	Field Programmable Gate Array, 320 CLBs, 9000 Gates, 25MHz, CMOS, CPGA175, CERAMIC, PGA-175
package instruction	PGA,	PGA,	PGA,	PGA,
Reach Compliance Code	unknown	unknown	unknown	unknown
ECCN code	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C
maximum clock frequency	70 MHz	50 MHz	16 MHz	25 MHz
JESD-30 code	S-CPGA-P175	S-CPGA-P175	R-CPGA-P175	R-CPGA-P175
Configurable number of logic blocks	320	320	320	320
Equivalent number of gates	5000	9000	9000	9000
Number of terminals	175	175	175	175
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C
organize	320 CLBS, 5000 GATES	320 CLBS, 9000 GATES	320 CLBS, 9000 GATES	320 CLBS, 9000 GATES
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA	PGA	PGA	PGA
Package shape	SQUARE	SQUARE	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Nominal supply voltage	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY
Terminal form	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG
Terminal location	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR
Base Number Matches	1	1	1	1
Maker	XILINX	-	XILINX	XILINX
Parts packaging code	PGA	-	PGA	PGA
Contacts	175	-	175	175
Combined latency of CLB-Max	2 ns	-	14 ns	9 ns
JESD-609 code	e4	-	e4	e4
Filter level	MIL-STD-883	-	MIL-STD-883	MIL-STD-883
Terminal surface	GOLD	-	GOLD	GOLD

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