M2V64S40DTP-5 datasheet, PDF - EEWORLD Datasheet

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M2V64S40DTP-5: DescriptionSynchronous DRAM, 4MX16, 5.4ns, CMOS, PDSO54, 0.400 INCH, 0.80 MM PITCH, TSOP2-54; Categorystorage storage; File Size512KB，51 Pages; ManufacturerMitsubishi; Websitehttp://www.mitsubishielectric.com/semiconductors/

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M2V64S40DTP-5 Overview

Synchronous DRAM, 4MX16, 5.4ns, CMOS, PDSO54, 0.400 INCH, 0.80 MM PITCH, TSOP2-54

M2V64S40DTP-5 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Mitsubishi
Parts packaging code	TSOP2
package instruction	TSOP2, TSOP54,.46,32
Contacts	54
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Maximum access time	5.4 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	166 MHz
I/O type	COMMON
interleaved burst length	1,2,4,8
JESD-30 code	R-PDSO-G54
JESD-609 code	e0
length	22.22 mm
memory density	67108864 bit
Memory IC Type	SYNCHRONOUS DRAM
memory width	16
Number of functions	1
Number of ports	1
Number of terminals	54
word count	4194304 words
character code	4000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	4MX16
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP2
Encapsulate equivalent code	TSOP54,.46,32
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Certification status	Not Qualified
refresh cycle	4096
Maximum seat height	1.2 mm
self refresh	YES
Continuous burst length	1,2,4,8,FP
Maximum standby current	0.001 A
Maximum slew rate	0.17 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10.16 mm

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-5,-5L:Preliminary

MITSUBISHI LSIs

M2V64S20DTP-5,-5L,-6,-6L,-7,-7L

M2V64S30DTP-5,-5L,-6,-6L,-7,-7L

SDRAM (Rev.4.2)

M2V64S40DTP-5,-5L,-6,-6L,-7,-7L

Jun.'01

(4-BANK x 4,194,304-WORD x

(4-BANK x 2,097,152-WORD x

4-BIT)

8-BIT)

(4-BANK x 1,048,576-WORD x 16-BIT)

64M Synchronous DRAM

Some of contents are described for general products and are subject to change w ithout notice.

DESCRIPTION

M 2V64S20DTP is a 4-bank x 4,194,304-word x 4-bit,

M 2V64S30DTP is a 4-bank x 2,097,152-word x 8-bit,

M 2V64S40DTP is a 4-bank x 1,048,576-word x 16-bit,

synchronous DRAM , with LVTTL interface. All inputs and outputs are referenced to the rising edge

of CLK. M 2V64S20DTP, M2V64S30DTP and M 2V64S40DTP achieve very high speed data rate up

to 166MHz for -5, 133MHz for -6, 100MHz for -7, and are suitable for main memory or graphic

memory in computer systems.

FEATURES

M2V64S20/30/40DTP

ITEM

tCLK

tRAS

tRCD

tAC

tRC

Icc1

Clock Cycle Time

Active to Precharge Command Period

Row to Column Delay

Access Time from CLK

Active Command Period

Operation Current

(Max.)

(Single Bank)

(Max.)

(Min.)

(Max.) (CL=3)

(Min.)

V64S20D

V64S30D

V64S40D

Icc6

Self Refresh Current

-5

6ns

42ns

15ns

5.4ns

60ns

90mA

100mA

1mA

-6

7.5ns

45ns

20ns

5.4ns

67.5ns

75mA

85mA

1mA

-7

10ns

50ns

20ns

6ns

70ns

70mA

80mA

1mA

- Single 3.3v±0.3V power supply

- Max. Clock frequency -5:166MHz<3-3-3>, -6:133MHz<3-3-3>, -7:100MHz<2-2-2>

- Fully Synchronous operation referenced to clock rising edge

- 4 bank operation controlled by BA0 & BA1 (Bank Address)

- /CAS latency- 2 and 3 (programmable)

- Burst length- 1, 2, 4, 8 and full page (programmable)

- Burst type- sequential and interleave (programmable)

- Byte Control- DQM L and DQMU for M2V64S40DTP

- Random column access

- Auto precharge and All bank precharge controlled by A10

- Auto refresh and Self refresh

- 4096 refresh cycles every 64ms

- LVTTL Interface

- 400-mil, 54-pin Thin Small Outline Package (TSOP II) with 0.8mm lead pitch

MITSUBISHI ELECTRIC

M2V64S40DTP-5 Related Products

	M2V64S40DTP-5	1N4748A	M2V64S20DTP-5L	M2V64S30DTP-5L	M2V64S30DTP-5	M2V64S40DTP-5L
Description	Synchronous DRAM, 4MX16, 5.4ns, CMOS, PDSO54, 0.400 INCH, 0.80 MM PITCH, TSOP2-54	Custom bar coding for shipments	Synchronous DRAM, 16MX4, 5.4ns, CMOS, PDSO54, 0.400 INCH, 0.80 MM PITCH, TSOP2-54	Synchronous DRAM, 8MX8, 5.4ns, CMOS, PDSO54, 0.400 INCH, 0.80 MM PITCH, TSOP2-54	Synchronous DRAM, 8MX8, 5.4ns, CMOS, PDSO54, 0.400 INCH, 0.80 MM PITCH, TSOP2-54	Synchronous DRAM, 4MX16, 5.4ns, CMOS, PDSO54, 0.400 INCH, 0.80 MM PITCH, TSOP2-54
Is it Rohs certified?	incompatible	-	incompatible	incompatible	incompatible	incompatible
Maker	Mitsubishi	-	Mitsubishi	Mitsubishi	Mitsubishi	Mitsubishi
Parts packaging code	TSOP2	-	TSOP2	TSOP2	TSOP2	TSOP2
package instruction	TSOP2, TSOP54,.46,32	-	TSOP2, TSOP54,.46,32	TSOP2, TSOP54,.46,32	TSOP2, TSOP54,.46,32	TSOP2, TSOP54,.46,32
Contacts	54	-	54	54	54	54
Reach Compliance Code	unknown	-	unknown	unknown	unknown	unknown
ECCN code	EAR99	-	EAR99	EAR99	EAR99	EAR99
access mode	FOUR BANK PAGE BURST	-	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST
Maximum access time	5.4 ns	-	5.4 ns	5.4 ns	5.4 ns	5.4 ns
Other features	AUTO/SELF REFRESH	-	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	166 MHz	-	166 MHz	166 MHz	166 MHz	166 MHz
I/O type	COMMON	-	COMMON	COMMON	COMMON	COMMON
interleaved burst length	1,2,4,8	-	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8
JESD-30 code	R-PDSO-G54	-	R-PDSO-G54	R-PDSO-G54	R-PDSO-G54	R-PDSO-G54
JESD-609 code	e0	-	e0	e0	e0	e0
length	22.22 mm	-	22.22 mm	22.22 mm	22.22 mm	22.22 mm
memory density	67108864 bit	-	67108864 bit	67108864 bit	67108864 bit	67108864 bit
Memory IC Type	SYNCHRONOUS DRAM	-	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM
memory width	16	-	4	8	8	16
Number of functions	1	-	1	1	1	1
Number of ports	1	-	1	1	1	1
Number of terminals	54	-	54	54	54	54
word count	4194304 words	-	16777216 words	8388608 words	8388608 words	4194304 words
character code	4000000	-	16000000	8000000	8000000	4000000
Operating mode	SYNCHRONOUS	-	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	-	70 °C	70 °C	70 °C	70 °C
organize	4MX16	-	16MX4	8MX8	8MX8	4MX16
Output characteristics	3-STATE	-	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSOP2	-	TSOP2	TSOP2	TSOP2	TSOP2
Encapsulate equivalent code	TSOP54,.46,32	-	TSOP54,.46,32	TSOP54,.46,32	TSOP54,.46,32	TSOP54,.46,32
Package shape	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE	-	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	3.3 V	-	3.3 V	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified
refresh cycle	4096	-	4096	4096	4096	4096
Maximum seat height	1.2 mm	-	1.2 mm	1.2 mm	1.2 mm	1.2 mm
self refresh	YES	-	YES	YES	YES	YES
Continuous burst length	1,2,4,8,FP	-	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP
Maximum standby current	0.001 A	-	0.001 A	0.001 A	0.001 A	0.001 A
Maximum slew rate	0.17 mA	-	0.17 mA	0.17 mA	0.17 mA	0.17 mA
Maximum supply voltage (Vsup)	3.6 V	-	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	-	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	-	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	-	YES	YES	YES	YES
technology	CMOS	-	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	-	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	-	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	-	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.8 mm	-	0.8 mm	0.8 mm	0.8 mm	0.8 mm
Terminal location	DUAL	-	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	10.16 mm	-	10.16 mm	10.16 mm	10.16 mm	10.16 mm

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