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ICS9112AF-17LF-T

Description
9112 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16, 0.150 INCH, MO-137, GREEN, SSOP-16
Categorylogic    logic   
File Size163KB,12 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
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ICS9112AF-17LF-T Overview

9112 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16, 0.150 INCH, MO-137, GREEN, SSOP-16

ICS9112AF-17LF-T Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeSSOP
package instructionSSOP,
Contacts16
Reach Compliance Codecompliant
Other featuresALSO OPERATES WITH 5V SUPPLY
series9112
Input adjustmentSTANDARD
JESD-30 codeR-PDSO-G16
JESD-609 codee3
length4.9 mm
Logic integrated circuit typePLL BASED CLOCK DRIVER
Number of functions1
Number of inverted outputs
Number of terminals16
Actual output times8
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)0.7 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.25 ns
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)3.63 V
Minimum supply voltage (Vsup)2.97 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelCOMMERCIAL
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3.9 mm
minfmax133 MHz
Integrated
Circuit
Systems, Inc.
ICS9112-17
Low Skew Output Buffer
General Description
The
ICS9112-17
is a high performance, low skew, low jitter
zero delay buffer. It uses a phase lock loop (PLL)
technology to align, in both phase and frequency, the REF
input with the CLKOUT signal. It is designed to distribute
high speed clocks in PC systems operating at speeds
from 25 to 133 MHz.
ICS9112-17
is a zero delay buffer that provides
synchronization between the input and output. The
synchronization is established via CLKOUT feed back to
the input of the PLL. Since the skew between the input and
output is less than +/- 350 pS, the part acts as a zero delay
buffer.
The
ICS9112-17
has two banks of four outputs controlled
by two address lines. Depending on the selected address
line, bank B or both banks can be put in a tri-state mode.
In this mode, the PLL is still running and only the output
buffers are put in a high impedance mode. The test mode
shuts off the PLL and connects the input directly to the
output buffers (see table below for functionality).
The
ICS9112-17
comes in a sixteen pin 150 mil SOIC or
16 pin SSOP package. In the absence of REF input, will
be in the power down mode. In this mode, the PLL is turned
off and the output buffers are pulled low. Power down mode
provides the lowest power consumption for a standby
condition.
Features
Zero input - output delay
Frequency range 25 - 133 MHz (3.3V)
High loop filter bandwidth ideal for Spread Spectrum
applications.
Less than 200 ps cycle to cycle Jitter
Skew controlled outputs
Skew less than 250 ps between outputs
Available in 16 pin, 150 mil SSOP & SOIC package
Pin Configuration
Block Diagram
16 pin SSOP & SOIC
Functionality
FS2 FS1
0
0
1
1
0
1
0
1
CLKA
(1, 4)
Driven
CLKB
(1, 4)
Tristate
CLKOUT
Driven
Driven
PLL
Bypass
Mode
Driven
Output
Source
PLL
PLL
REF
PLL
PLL
Shutdown
N
N
Y
N
Tristate Tristate
PLL
PLL
Bypass Bypass
Mode
Mode
Driven
Driven
0051J—02/05/04

ICS9112AF-17LF-T Related Products

ICS9112AF-17LF-T 9112AF-17T ICS9112AF-17-T ICS9112AF-17T 9112AM-17T ICS9112AM-17T ICS9112AF-17 9112AM-17 ICS9112AM-17 9112AF-17
Description 9112 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16, 0.150 INCH, MO-137, GREEN, SSOP-16 PLL Based Clock Driver, 9112 Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 INCH, MO-137, SSOP-16 9112 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16, 0.150 INCH, MO-137, SSOP-16 PLL Based Clock Driver, 9112 Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 INCH, MO-137, SSOP-16 PLL Based Clock Driver, 9112 Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 INCH, MS-012, SOIC-16 PLL Based Clock Driver, 9112 Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 INCH, MS-012, SOIC-16 PLL Based Clock Driver, 9112 Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 INCH, MO-137, SSOP-16 PLL Based Clock Driver, 9112 Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 INCH, MS-012, SOIC-16 PLL Based Clock Driver, 9112 Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 INCH, MS-012, SOIC-16 PLL Based Clock Driver, 9112 Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 INCH, MO-137, SSOP-16
Is it Rohs certified? conform to incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code SSOP SSOP SSOP SSOP SOIC SOIC SSOP SOIC SOIC SSOP
package instruction SSOP, SSOP, SSOP16,.25 SSOP, SSOP, SSOP16,.25 SOP, SOP16,.25 SOP, SOP16,.25 SSOP, SSOP16,.25 SOP, SOP16,.25 SOP, SOP16,.25 SSOP, SSOP16,.25
Contacts 16 16 16 16 16 16 16 16 16 16
Reach Compliance Code compliant not_compliant compliant not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant
Other features ALSO OPERATES WITH 5V SUPPLY ALSO OPERATES WITH 5V SUPPLY ALSO OPERATES WITH 5V SUPPLY ALSO OPERATES WITH 5V SUPPLY ALSO OPERATES WITH 5V SUPPLY ALSO OPERATES WITH 5V SUPPLY ALSO OPERATES WITH 5V SUPPLY - ALSO OPERATES WITH 5V SUPPLY ALSO OPERATES WITH 5V SUPPLY
series 9112 9112 9112 9112 9112 9112 9112 - 9112 9112
Input adjustment STANDARD STANDARD STANDARD STANDARD STANDARD STANDARD STANDARD - STANDARD STANDARD
JESD-30 code R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 - R-PDSO-G16 R-PDSO-G16
JESD-609 code e3 e0 e0 e0 e0 e0 e0 - e0 e0
length 4.9 mm 4.9 mm 4.9 mm 4.9 mm 9.9 mm 9.9 mm 4.9 mm - 9.9 mm 4.9 mm
Logic integrated circuit type PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER - PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER
Number of functions 1 1 1 1 1 1 1 - 1 1
Number of terminals 16 16 16 16 16 16 16 - 16 16
Actual output times 8 8 8 8 8 8 8 - 8 8
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C - 70 °C 70 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE - 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SSOP SSOP SSOP SSOP SOP SOP SSOP - SOP SSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR - RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE, SHRINK PITCH - SMALL OUTLINE SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 260 240 NOT SPECIFIED NOT SPECIFIED 240 240 NOT SPECIFIED - 240 240
propagation delay (tpd) 0.7 ns 0.7 ns 0.7 ns 0.7 ns 0.7 ns 0.7 ns 0.7 ns - 0.7 ns 0.7 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified - Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.25 ns 0.25 ns 0.25 ns 0.25 ns 0.25 ns 0.25 ns 0.25 ns - 0.25 ns 0.25 ns
Maximum seat height 1.75 mm 1.75 mm 1.75 mm 1.75 mm 1.75 mm 1.75 mm 1.75 mm - 1.75 mm 1.75 mm
Maximum supply voltage (Vsup) 3.63 V 3.63 V 3.63 V 3.63 V 3.63 V 3.63 V 3.63 V - 3.63 V 3.63 V
Minimum supply voltage (Vsup) 2.97 V 2.97 V 2.97 V 2.97 V 2.97 V 2.97 V 2.97 V - 2.97 V 2.97 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V - 3.3 V 3.3 V
surface mount YES YES YES YES YES YES YES - YES YES
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL - COMMERCIAL COMMERCIAL
Terminal surface MATTE TIN Tin/Lead (Sn85Pb15) TIN LEAD Tin/Lead (Sn85Pb15) TIN LEAD TIN LEAD Tin/Lead (Sn85Pb15) - TIN LEAD Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING - GULL WING GULL WING
Terminal pitch 0.635 mm 0.635 mm 0.635 mm 0.635 mm 1.27 mm 1.27 mm 0.635 mm - 1.27 mm 0.635 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL - DUAL DUAL
Maximum time at peak reflow temperature 30 20 NOT SPECIFIED NOT SPECIFIED 20 30 NOT SPECIFIED - 30 20
width 3.9 mm 3.9 mm 3.9 mm 3.9 mm 3.9 mm 3.9 mm 3.9 mm - 3.9 mm 3.9 mm
minfmax 133 MHz 133 MHz 133 MHz 133 MHz 133 MHz 133 MHz 133 MHz - 133 MHz 133 MHz
MaximumI(ol) - 0.008 A - 0.008 A 0.008 A 0.008 A 0.008 A - 0.008 A 0.008 A
Humidity sensitivity level - 1 - 1 1 1 1 - 1 1
Encapsulate equivalent code - SSOP16,.25 - SSOP16,.25 SOP16,.25 SOP16,.25 SSOP16,.25 - SOP16,.25 SSOP16,.25
power supply - 3.3/5 V - 3.3/5 V 3.3/5 V 3.3/5 V 3.3/5 V - 3.3/5 V 3.3/5 V
Base Number Matches - 1 1 1 1 1 1 - - -
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