14-Bit, 105/125 MSPS, IF Sampling ADC
AD9445
FEATURES
125 MSPS guaranteed sampling rate (AD9445BSV-125)
78.3 dBFS SNR/92 dBFS SFDR with 30 MHz input (3.2 V p-p)
74.8 dBFS SNR/95 dBFS SFDR with 30 MHz input (2.0 V p-p)
77.0 dBFS SNR/87 dBFS SFDR with 170 MHz input (3.2 V p-p)
74.6 dBFS SNR/95 dBFS SFDR with 170 MHz input (2.0 V p-p)
73.0 dBFS SNR/88 dBFS SFDR with 300 MHz input (2.0 V p-p)
102 dBFS 2-tone SFDR with 30 MHz and 31 MHz
92 dBFS 2-tone SFDR with 170 MHz and 171 MHz
60 fsec rms jitter
Excellent linearity
DNL = ±0.25 LSB typical
INL = ±0.8 LSB typical
2.0 V p-p to 4.0 V p-p differential full-scale input
Buffered analog inputs
LVDS outputs (ANSI-644 compatible) or CMOS outputs
Data format select (offset binary or twos complement)
Output clock available
3.3 V and 5 V supply operation
FUNCTIONAL BLOCK DIAGRAM
AGND AVDD1 AVDD2
DRGND DRVDD
RF ENABLE
DFS
14
CMOS
OR
LVDS
OUTPUT
STAGING
DCS MODE
OUTPUT MODE
OR
D13 TO D0
2
DCO
REF
05489-001
AD9445
BUFFER
VIN+
VIN–
T/H
PIPELINE
ADC
2
28
CLK+
CLK–
CLOCK
AND TIMING
MANAGEMENT
VREF SENSE REFT REFB
Figure 1.
Optional features allow users to implement various selectable
operating conditions, including input range, data format select,
high IF sampling mode, and output data mode.
The AD9445 is available in a Pb-free, 100-lead, surface-mount,
plastic package (100-lead TQFP/EP) specified over the
industrial temperature range −40°C to +85°C.
APPLICATIONS
Multicarrier, multimode cellular receivers
Antenna array positioning
Power amplifier linearization
Broadband wireless
Radar
Infrared imaging
Medical imaging
Communications instrumentation
PRODUCT HIGHLIGHTS
1.
High performance: outstanding SFDR performance for IF
sampling applications such as multicarrier, multimode 3G,
and 4G cellular base station receivers.
Ease of use: on-chip reference and high input impedance
track-and-hold with adjustable analog input range and an
output clock simplifies data capture.
Packaged in a Pb-free, 100-lead TQFP/EP package.
Clock duty cycle stabilizer (DCS) maintains overall ADC
performance over a wide range of clock pulse widths.
OR (out-of-range) outputs indicate when the signal is
beyond the selected input range.
RF enable pin allows users to configure the device for
optimum SFDR when sampling frequencies above 210 MHz
(AD9445-125) or 240 MHz (AD9445-105).
2.
GENERAL DESCRIPTION
The AD9445 is a 14-bit, monolithic, sampling analog-to-digital
converter (ADC) with an on-chip IF sampling track-and-hold
circuit. It is optimized for performance, small size, and ease of
use. The product operates at up to a 125 MSPS conversion rate
and is designed for multicarrier, multimode receivers, such as
those found in cellular infrastructure equipment.
The ADC requires 3.3 V and 5.0 V power supplies and a low
voltage differential input clock for full performance operation.
No external reference or driver components are required for
many applications. Data outputs are CMOS or LVDS
compatible (ANSI-644 compatible) and include the means to
reduce the overall current needed for short trace distances.
3.
4.
5.
6.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.
AD9445
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
DC Specifications ......................................................................... 3
AC Specifications.......................................................................... 4
Digital Specifications ................................................................... 6
Switching Specifications .............................................................. 6
Timing Diagrams.......................................................................... 7
Absolute Maximum Ratings............................................................ 8
Thermal Resistance ...................................................................... 8
ESD Caution.................................................................................. 8
Terminology .......................................................................................9
Pin Configurations and Function Descriptions ......................... 10
Equivalent Circuits......................................................................... 15
Typical Performance Characteristics ........................................... 16
Theory of Operation ...................................................................... 24
Analog Input and Reference Overview ................................... 24
Clock Input Considerations...................................................... 26
Power Considerations................................................................ 27
Digital Outputs ........................................................................... 27
Timing ......................................................................................... 27
Operational Mode Selection ..................................................... 28
Evaluation Board ............................................................................ 29
Outline Dimensions ....................................................................... 37
Ordering Guide .......................................................................... 37
REVISION HISTORY
10/05—Revision 0: Initial Version
Rev. 0 | Page 2 of 40
AD9445
SPECIFICATIONS
DC SPECIFICATIONS
AVDD1 = 3.3 V, AVDD2 = 5.0 V, DRVDD = 3.3 V, LVDS mode, specified minimum sampling rate, 2.0 V p-p differential input, internal
trimmed reference (1.0 V mode), AIN = −1.0 dBFS, DCS on, unless otherwise noted. RF ENABLE = AGND.
Table 1.
Parameter
RESOLUTION
ACCURACY
No Missing Codes
Offset Error
Gain Error
Differential Nonlinearity (DNL)
1
Integral Nonlinearity (INL)
1
VOLTAGE REFERENCE
Output Voltage VREF = 1.0 V
Load Regulation @ 1.0 mA
Reference Input Current (External VREF = 1.6 V)
INPUT REFERRED NOISE
ANALOG INPUT
Input Span
VREF = 1.6 V
VREF = 1.0 V
Internal Input Common-Mode Voltage
External Input Common-Mode Voltage
Input Resistance
2
Input Capacitance
2
POWER SUPPLIES
Supply Voltage
AVDD1
AVDD2
DRVDD—LVDS Outputs
DRVDD—CMOS Outputs
Supply Current
1
AVDD1
AVDD2
1, 3
I
DRVDD1
—LVDS Outputs
I
DRVDD1
—CMOS Outputs
PSRR
Offset
Gain
POWER CONSUMPTION
LVDS Outputs
CMOS Outputs (DC Input)
1
Temp
Full
Full
Full
25°C
Full
25°C
Full
25°C
Full
Full
Full
Full
25°C
AD9445BSVZ-105
Min
Typ
Max
14
Guaranteed
−7
±3
−3
−2
−0.6
5
−1.6
0.9
1.0
±2
1.0
+3
+2
+0.65
+7
AD9445BSVZ-125
Min
Typ
Max
14
Guaranteed
−7
±3
−3
−2
−0.6
5
−2
0.9
1.0
±2
1.0
+3
+2
+0.65
+7
Unit
Bits
±0.25
±0.65
±0.25
±0.8
mV
mV
% FSR
% FSR
LSB
LSB
LSB
V
mV
μA
LSB rms
+1.6
1.1
+2
1.1
Full
Full
Full
Full
Full
Full
3.2
2.0
3.5
3.1
1
6
3.9
3.1
3.2
2.0
3.5
3.9
1
6
V p-p
V p-p
V
V
kΩ
pF
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
3.14
4.75
3.0
3.0
3.3
5.0
3.3
335
169
63
14
1
0.2
2.2
2.0
3.46
5.25
3.6
3.6
364
196
78
3.14
4.75
3.0
3.0
3.3
5.0
3.3
384
172
63
14
1
0.2
3.46
5.25
3.6
3.6
424
199
78
V
V
V
V
mA
mA
mA
mA
mV/V
%/V
2.4
2.3
2.1
2.6
W
W
Measured at the maximum clock rate, f
IN
= 15 MHz, full-scale sine wave, with a 100 Ω differential termination on each pair of output bits for LVDS output mode and
approximately 5 pF loading on each output bit for CMOS output mode.
2
Input capacitance or resistance refers to the effective impedance between one differential input pin and AGND. Refer to Figure 6 for the equivalent analog input structure.
3
For RF ENABLE = AVDD1, I
AVDD2
increases by ~30 mA, which increases power dissipation.
Rev. 0 | Page 3 of 40
AD9445
AC SPECIFICATIONS
AVDD1 = 3.3 V, AVDD2 = 5.0 V, DRVDD = 3.3 V, LVDS mode, specified minimum sample rate, 2.0 V p-p differential input, internal
trimmed reference (1.0 V mode), A
IN
= −1.0 dBFS, DCS on, RF ENABLE = ground, unless otherwise noted.
Table 2.
Parameter
SIGNAL-TO-NOISE RATIO (SNR)
f
IN
= 10 MHz
f
IN
= 30 MHz
f
IN
= 170 MHz
f
IN
= 225 MHz
1
f
IN
= 300 MHz
2
f
IN
= 400 MHz
2
f
IN
= 450 MHz
2
f
IN
= 10 MHz (3.2 V p-p Input)
f
IN
= 30 MHz (3.2 V p-p Input)
f
IN
= 170 MHz (3.2 V p-p Input)
f
IN
= 225 MHz (3.2 V p-p Input)
1
f
IN
= 300 MHz (3.2 V p-p Input)
2
SIGNAL-TO-NOISE AND DISTORTION (SINAD)
f
IN
= 10 MHz
f
IN
= 30 MHz
f
IN
= 170 MHz
f
IN
= 225 MHz
1
f
IN
= 300 MHz
2
f
IN
= 400 MHz
2
f
IN
= 450 MHz
2
f
IN
= 10 MHz (3.2 V p-p Input)
f
IN
= 30 MHz (3.2 V p-p Input)
f
IN
= 170 MHz (3.2 V p-p Input)
f
IN
= 225 MHz (3.2 V p-p Input)
1
f
IN
= 300 MHz (3.2 V p-p Input)
2
EFFECTIVE NUMBER OF BITS (ENOB)
f
IN
= 10 MHz
f
IN
= 30 MHz
f
IN
= 170 MHz
f
IN
= 225 MHz
1
f
IN
= 300 MHz
2
f
IN
= 400 MHz
2
f
IN
= 450 MHz
2
Temp
25°C
25°C
Full
25°C
25°C
Full
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
Full
25°C
25°C
Full
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
AD9445BSVZ-105
Min
Typ
Max
74.3
74.3
73.6
73
72.1
71
70.5
77.6
77.5
76
75.3
73.7
74.2
74.2
73.3
72.5
71.7
67.2
65.2
77.4
77.3
75.7
75.1
72.5
12.2
12.2
12.1
12.0
11.8
11.7
11.6
AD9445BSVZ-125
Min
Typ
Max
74.1
73.8
73.2
72.9
72
71
70.5
77.3
77.3
76
75.4
73.5
73.9
73.7
73.0
72.5
71.5
66.3
64.3
76.9
76.8
75.4
75.2
71.8
12.2
12.1
12.0
12.0
11.8
11.7
11.6
Unit
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Bits
Bits
Bits
Bits
Bits
Bits
Bits
73.3
73
72.9
72.2
72.2
71.4
72.9
72.5
72.3
72
71.4
71.3
73.2
72.8
72.3
71.4
71.3
70.2
72.8
72.3
72.4
71.9
70.7
69.3
Rev. 0 | Page 4 of 40
AD9445
Parameter
SPURIOUS-FREE DYNAMIC RANGE
(SFDR, Second or Third Harmonic)
f
IN
= 10 MHz
f
IN
= 30 MHz
f
IN
= 170 MHz
f
IN
= 225 MHz
1
f
IN
= 300 MHz
2
f
IN
= 400 MHz
2
f
IN
= 450 MHz
2
f
IN
= 10 MHz (3.2 V p-p Input)
f
IN
= 30 MHz (3.2 V p-p Input)
f
IN
= 170 MHz (3.2 V p-p Input)
f
IN
= 225 MHz (3.2 V p-p Input)
1
f
IN
= 300 MHz (3.2 V p-p Input)
2
WORST SPUR EXCLUDING SECOND OR
THIRD HARMONICS
f
IN
= 10 MHz
f
IN
= 30 MHz
f
IN
= 170 MHz
f
IN
= 225 MHz
1
f
IN
= 300 MHz
2
f
IN
= 400 MHz
2
f
IN
= 450 MHz
2
f
IN
= 10 MHz (3.2 V p-p Input)
f
IN
= 30 MHz (3.2 V p-p Input)
f
IN
= 170 MHz (3.2 V p-p Input)
f
IN
= 225 MHz (3.2 V p-p Input)
1
f
IN
= 300 MHz (3.2 V p-p Input)
2
TWO-TONE SFDR
f
IN
= 30.3 MHz @ −7 dBFS,
31.3 MHz @ −7 dBFS
f
IN
= 170.3 MHz @ −7 dBFS,
171.3 MHz @ −7 dBFS
ANALOG BANDWIDTH
1
2
Temp
AD9445BSVZ-105
Min
Typ
Max
AD9445BSVZ-125
Min
Typ
Max
Unit
25°C
25°C
Full
25°C
25°C
Full
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
84
83
82
76
75
76
95
92
94
87
87
75
70
92
88
86
81
77
85
82
80
83
75
75
95
94
91
88
87
73
69
92
91
86
80
76
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
25°C
25°C
Full
25°C
25°C
Full
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
Full
−97
−99
−99
−94
−97
−93
−82
−97
−97
−97
−95
−93
102
92
615
−90
−90
−92
−88
−86
−90
−97
−98
−93
−94
−92
−93
−87
−95
−95
−95
−94
−91
102
91
615
−89
−88
−85
−84
−80
−82
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBFS
dBFS
MHz
RF ENABLE = low (AGND ) for AD9445-105; RF ENABLE = high (AVDD1) for AD9445-125.
RF ENABLE = high (AVDD1).
Rev. 0 | Page 5 of 40
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