AD9445-BB-PCB datasheet, PDF - EEWORLD Datasheet

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AD9445-BB-PCB: Description1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100; Categorysemiconductor logic; File Size758KB，40 Pages; ManufacturerADI; Websitehttps://www.analog.com

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AD9445-BB-PCB Overview

1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100

AD9445-BB-PCB Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	100
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Rated supply voltage	3.3 V
Processing package description	LEAD FREE, PLASTIC, MS-026-AED, TQFP-100
state	ACTIVE
packaging shape	SQUARE
Package Size	FLATPACK, THIN PROFILE, FINE PITCH
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.5000 mm
terminal coating	MATTE TIN
Terminal location	QUAD
Packaging Materials	PLASTIC/EPOXY
Temperature level	INDUSTRIAL
Sampling Rate	105 MHz
Output format	PARALLEL, WORD
Type of converter	PROPRIETARY METHOD
Number of digits	14
Output bit encoding	OFFSET BINARY, 2S COMPLEMENT BINARY
Number of analog channels	1
Sample and hold and track and hold	TRACK

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14-Bit, 105/125 MSPS, IF Sampling ADC

AD9445

FEATURES

125 MSPS guaranteed sampling rate (AD9445BSV-125)

78.3 dBFS SNR/92 dBFS SFDR with 30 MHz input (3.2 V p-p)

74.8 dBFS SNR/95 dBFS SFDR with 30 MHz input (2.0 V p-p)

77.0 dBFS SNR/87 dBFS SFDR with 170 MHz input (3.2 V p-p)

74.6 dBFS SNR/95 dBFS SFDR with 170 MHz input (2.0 V p-p)

73.0 dBFS SNR/88 dBFS SFDR with 300 MHz input (2.0 V p-p)

102 dBFS 2-tone SFDR with 30 MHz and 31 MHz

92 dBFS 2-tone SFDR with 170 MHz and 171 MHz

60 fsec rms jitter

Excellent linearity

DNL = ±0.25 LSB typical

INL = ±0.8 LSB typical

2.0 V p-p to 4.0 V p-p differential full-scale input

Buffered analog inputs

LVDS outputs (ANSI-644 compatible) or CMOS outputs

Data format select (offset binary or twos complement)

Output clock available

3.3 V and 5 V supply operation

FUNCTIONAL BLOCK DIAGRAM

AGND AVDD1 AVDD2

DRGND DRVDD

RF ENABLE

DFS

CMOS

LVDS

OUTPUT

STAGING

DCS MODE

OUTPUT MODE

D13 TO D0

DCO

REF

05489-001

AD9445

BUFFER

VIN+

VIN–

T/H

PIPELINE

ADC

CLK+

CLK–

CLOCK

AND TIMING

MANAGEMENT

VREF SENSE REFT REFB

Figure 1.

Optional features allow users to implement various selectable

operating conditions, including input range, data format select,

high IF sampling mode, and output data mode.

The AD9445 is available in a Pb-free, 100-lead, surface-mount,

plastic package (100-lead TQFP/EP) specified over the

industrial temperature range −40°C to +85°C.

APPLICATIONS

Multicarrier, multimode cellular receivers

Antenna array positioning

Power amplifier linearization

Broadband wireless

Radar

Infrared imaging

Medical imaging

Communications instrumentation

PRODUCT HIGHLIGHTS

High performance: outstanding SFDR performance for IF

sampling applications such as multicarrier, multimode 3G,

and 4G cellular base station receivers.

Ease of use: on-chip reference and high input impedance

track-and-hold with adjustable analog input range and an

output clock simplifies data capture.

Packaged in a Pb-free, 100-lead TQFP/EP package.

Clock duty cycle stabilizer (DCS) maintains overall ADC

performance over a wide range of clock pulse widths.

OR (out-of-range) outputs indicate when the signal is

beyond the selected input range.

RF enable pin allows users to configure the device for

optimum SFDR when sampling frequencies above 210 MHz

(AD9445-125) or 240 MHz (AD9445-105).

GENERAL DESCRIPTION

The AD9445 is a 14-bit, monolithic, sampling analog-to-digital

converter (ADC) with an on-chip IF sampling track-and-hold

circuit. It is optimized for performance, small size, and ease of

use. The product operates at up to a 125 MSPS conversion rate

and is designed for multicarrier, multimode receivers, such as

those found in cellular infrastructure equipment.

The ADC requires 3.3 V and 5.0 V power supplies and a low

voltage differential input clock for full performance operation.

No external reference or driver components are required for

many applications. Data outputs are CMOS or LVDS

compatible (ANSI-644 compatible) and include the means to

reduce the overall current needed for short trace distances.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

www.analog.com

Fax: 781.461.3113

AD9445

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

DC Specifications ......................................................................... 3

AC Specifications.......................................................................... 4

Digital Specifications ................................................................... 6

Switching Specifications .............................................................. 6

Timing Diagrams.......................................................................... 7

Absolute Maximum Ratings............................................................ 8

Thermal Resistance ...................................................................... 8

ESD Caution.................................................................................. 8

Terminology .......................................................................................9

Pin Configurations and Function Descriptions ......................... 10

Equivalent Circuits......................................................................... 15

Typical Performance Characteristics ........................................... 16

Theory of Operation ...................................................................... 24

Analog Input and Reference Overview ................................... 24

Clock Input Considerations...................................................... 26

Power Considerations................................................................ 27

Digital Outputs ........................................................................... 27

Timing ......................................................................................... 27

Operational Mode Selection ..................................................... 28

Evaluation Board ............................................................................ 29

Outline Dimensions ....................................................................... 37

Ordering Guide .......................................................................... 37

REVISION HISTORY

10/05—Revision 0: Initial Version

Rev. 0 | Page 2 of 40

AD9445-BB-PCB Related Products

	AD9445-BB-PCB	AD9445-IF-LVDS	AD9445-BB-LVDS	AD9445-IF-PCB
Description	1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100	1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100	1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100	1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100
Number of functions	1	1	1	1
Number of terminals	100	100	100	100
Maximum operating temperature	85 Cel	85 Cel	85 Cel	85 Cel
Minimum operating temperature	-40 Cel	-40 Cel	-40 Cel	-40 Cel
Rated supply voltage	3.3 V	3.3 V	3.3 V	3.3 V
Processing package description	LEAD FREE, PLASTIC, MS-026-AED, TQFP-100	LEAD FREE, PLASTIC, MS-026-AED, TQFP-100	LEAD FREE, PLASTIC, MS-026-AED, TQFP-100	LEAD FREE, PLASTIC, MS-026-AED, TQFP-100
state	ACTIVE	ACTIVE	ACTIVE	ACTIVE
packaging shape	SQUARE	SQUARE	SQUARE	SQUARE
Package Size	FLATPACK, THIN PROFILE, FINE PITCH	FLATPACK, THIN PROFILE, FINE PITCH	FLATPACK, THIN PROFILE, FINE PITCH	FLATPACK, THIN PROFILE, FINE PITCH
surface mount	Yes	Yes	Yes	Yes
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING
Terminal spacing	0.5000 mm	0.5000 mm	0.5000 mm	0.5000 mm
terminal coating	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN
Terminal location	QUAD	QUAD	QUAD	QUAD
Packaging Materials	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Sampling Rate	105 MHz	105 MHz	105 MHz	105 MHz
Output format	PARALLEL, WORD	PARALLEL, WORD	PARALLEL, WORD	PARALLEL, WORD
Type of converter	PROPRIETARY METHOD	PROPRIETARY METHOD	PROPRIETARY METHOD	PROPRIETARY METHOD
Number of digits	14	14	14	14
Output bit encoding	OFFSET BINARY, 2S COMPLEMENT BINARY	OFFSET BINARY, 2S COMPLEMENT BINARY	OFFSET BINARY, 2S COMPLEMENT BINARY	OFFSET BINARY, 2S COMPLEMENT BINARY
Number of analog channels	1	1	1	1
Sample and hold and track and hold	TRACK	TRACK	TRACK	TRACK

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