74LVC2G66
Bilateral switch
Rev. 04 — 1 July 2008
Product data sheet
1. General description
The 74LVC2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device.
The 74LVC2G66 provides two single pole, single-throw analog switch functions. Each
switch has two input/output terminals (nY and nZ) and an active HIGH enable input (nE).
When nE is LOW, the analog switch is turned off.
Schmitt-trigger action at the enable inputs makes the circuit tolerant of slower input rise
and fall times across the entire V
CC
range from 1.65 V to 5.5 V.
2. Features
I
Wide supply voltage range from 1.65 V to 5.5 V
I
Very low ON resistance:
N
7.5
Ω
(typical) at V
CC
= 2.7 V
N
6.5
Ω
(typical) at V
CC
= 3.3 V
N
6
Ω
(typical) at V
CC
= 5 V
I
Switch current capability of 32 mA
I
High noise immunity
I
CMOS low power consumption
I
TTL interface compatibility at 3.3 V
I
Latch-up performance meets requirements of JESD78 Class I
I
ESD protection:
N
HBM JESD22-A114E exceeds 2000 V
N
MM JESD22-A115-A exceeds 200 V
I
Enable input accepts voltages up to 5.5 V
I
Multiple package options
I
Specified from
−40 °C
to +85
°C
and
−40 °C
to +125
°C
NXP Semiconductors
74LVC2G66
Bilateral switch
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74LVC2G66DP
74LVC2G66DC
74LVC2G66GT
74LVC2G66GD
74LVC2G66GM
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
TSSOP8
Description
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
Version
SOT505-2
SOT765-1
SOT833-1
SOT996-2
SOT902-1
Type number
VSSOP8 plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
XSON8
plastic extremely thin small outline package; no leads;
8 terminals; body 1
×
1.95
×
0.5 mm
XSON8U plastic extremely thin small outline package; no leads;
8 terminals; UTLP based; body 3
×
2
×
0.5 mm
XQFN8U plastic extremely thin quad flat package; no leads;
8 terminals; UTLP based; body 1.6
×
1.6
×
0.5 mm
4. Marking
Table 2.
Marking codes
Marking code
V66
V66
V66
V66
V66
Type number
74LVC2G66DP
74LVC2G66DC
74LVC2G66GT
74LVC2G66GD
74LVC2G66GM
5. Functional diagram
1
#
1
X1
1
#
001aah807
1
X1
001aah808
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
74LVC2G66_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 1 July 2008
2 of 24
NXP Semiconductors
74LVC2G66
Bilateral switch
Z
Y
E
V
CC
mna658
Fig 3.
Logic diagram (one switch)
6. Pinning information
6.1 Pinning
74LVC2G66
1Y
1
8
V
CC
1Z
2
7
1E
74LVC2G66
2E
1Y
1Z
2E
GND
1
2
3
4
001aaa529
3
6
2Z
8
7
6
5
V
CC
1E
2Z
2Y
GND
4
5
2Y
001aaf567
Transparent top view
Fig 4.
Pin configuration SOT505-2 (TSSOP8) and
SOT765-1 (VSSOP8)
Fig 5.
Pin configuration SOT833-1 (XSON8)
74LVC2G66
terminal 1
index area
1E
1
V
CC
8
74LVC2G66
1Y
1Z
2E
GND
1
2
3
4
8
7
6
5
V
CC
7
1Y
2Z
1E
2Z
2Y
2Y
2
6
1Z
3
4
5
2E
GND
001aaf568
001aai248
Transparent top view
Transparent top view
Fig 6.
74LVC2G66_4
Pin configuration SOT996-2 (XSON8U)
Fig 7.
Pin configuration SOT902-1 (XQFN8U)
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 1 July 2008
3 of 24
NXP Semiconductors
74LVC2G66
Bilateral switch
6.2 Pin description
Table 3.
Symbol
Pin description
Pin
SOT505-2, SOT765-1,
SOT833-1 and SOT996-2
1Y
1Z
2E
GND
2Y
2Z
1E
V
CC
1
2
3
4
5
6
7
8
SOT902-1
7
6
5
4
3
2
1
8
independent input or output
independent input or output
enable input (active HIGH)
ground (0 V)
independent input or output
independent input or output
enable input (active HIGH)
supply voltage
Description
7. Functional description
Table 4.
Input nE
L
H
[1]
H = HIGH voltage level; L = LOW voltage level.
Function table
[1]
Switch
OFF-state
ON-state
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
I
IK
I
SK
V
SW
I
SW
I
CC
I
GND
T
stg
P
tot
[1]
[2]
[3]
Parameter
supply voltage
input voltage
input clamping current
switch clamping current
switch voltage
switch current
supply current
ground current
storage temperature
total power dissipation
Conditions
[1]
Min
−0.5
−0.5
−50
-
[2]
Max
+6.5
+6.5
-
±50
V
CC
+ 0.5
±50
100
-
+150
250
Unit
V
V
mA
mA
V
mA
mA
mA
°C
mW
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5 V
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5 V
enable and disable mode
V
SW
>
−0.5
V or
V
SW
< V
CC
+ 0.5 V
−0.5
-
-
−100
−65
T
amb
=
−40 °C
to +125
°C
[3]
-
The minimum input voltage rating may be exceeded if the input current rating is observed.
The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed.
For TSSOP8 package: above 55
°C
the value of P
tot
derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110
°C
the value of P
tot
derates linearly with 8 mW/K.
For XSON8, XSON8U and XQFN8U packages: above 45
°C
the value of P
tot
derates linearly with 2.4 mW/K.
74LVC2G66_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 1 July 2008
4 of 24
NXP Semiconductors
74LVC2G66
Bilateral switch
9. Recommended operating conditions
Table 6.
Symbol
V
CC
V
I
V
SW
T
amb
∆t/∆V
Operating conditions
Parameter
supply voltage
input voltage
switch voltage
ambient temperature
input transition rise and fall rate
V
CC
= 1.65 V to 2.7 V
V
CC
= 2.7 V to 5.5 V
[1]
[3]
[3]
[1][2]
Conditions
Min
1.65
0
0
−40
-
-
Max
5.5
5.5
V
CC
+125
20
10
Unit
V
V
V
°C
ns/V
ns/V
To avoid sinking GND current from terminal nZ when switch current flows in terminal nY, the voltage drop across the bidirectional switch
must not exceed 0.4 V. If the switch current flows into terminal nZ, no GND current will flow from terminal nY. In this case, there is no
limit for the voltage drop across the switch.
For overvoltage tolerant switch voltage capability, refer to 74LVCV2G66.
Applies to control signal levels.
[2]
[3]
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
IH
HIGH-level
input voltage
Conditions
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
V
IL
LOW-level
input voltage
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
I
I
I
S(OFF)
input leakage
current
OFF-state
leakage
current
ON-state
leakage
current
supply current
pin nE; V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
V
I
= V
IH
or V
IL
;
V
CC
= 5.5 V; see
Figure 8
V
I
= V
IH
or V
IL
;
V
CC
= 5.5 V; see
Figure 9
V
I
= 5.5 V or GND;
V
SW
= GND or V
CC
;
I
O
= 0 A;
V
CC
= 1.65 V to 5.5 V
pin nE; V
I
= V
CC
−
0.6 V;
V
SW
= GND or V
CC
;
I
O
= 0 A; V
CC
= 5.5 V
[2]
−40 °C
to +85
°C
Min
0.65
×
V
CC
1.7
2.0
0.7
×
V
CC
-
-
-
-
-
-
Typ
[1]
-
-
-
-
-
-
-
-
±0.1
±0.1
Max
-
-
-
-
0.35
×
V
CC
0.7
0.8
0.3
×
V
CC
±5
±5
−40 °C
to +125
°C
Min
0.65
×
V
CC
1.7
2.0
0.7
×
V
CC
-
-
-
-
-
-
Max
-
-
-
-
0.7
0.8
0.3
×
V
CC
±100
±200
Unit
V
V
V
V
V
V
V
µA
µA
0.35
×
V
CC
V
[2]
I
S(ON)
[2]
-
±0.1
±5
-
±200
µA
I
CC
[2]
-
0.1
10
-
200
µA
∆I
CC
additional
supply current
[2]
-
5
500
-
5000
µA
74LVC2G66_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 1 July 2008
5 of 24
MCU
京公网安备 11010802033920号
EEWORLD
