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74LVTH16374A

Description
3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
File Size157KB,19 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
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74LVTH16374A Overview

3.3 V 16-bit edge-triggered D-type flip-flop; 3-state

74LVT16374A; 74LVTH16374A
3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
Rev. 07 — 22 March 2010
Product data sheet
1. General description
The 74LVT16374A; 74LVTH16374A are high performance BiCMOS products designed for
V
CC
operation at 3.3 V.
This device is a 16-bit edge-triggered D-type flip-flop featuring non-inverting 3-state
outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the
positive transition of the clock (nCP), the nQn outputs of the flip-flop take on the logic
levels set up at the nDn inputs.
2. Features and benefits
16-bit edge-triggered flip-flop
3-state buffers
Output capability: +64 mA and
−32
mA
TTL input and output switching levels
Input and output interface capability to systems at 5 V supply
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused
inputs
Live insertion and extraction permitted
Power-up reset
Power-up 3-state
No bus current loading when output is tied to 5 V bus
Latch-up protection:
JESD78B Class II exceeds 500 mA
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V

74LVTH16374A Related Products

74LVTH16374A 74LVT16374A 74LVT16374ADGG 74LVTH16374ADGG 74LVTH16374ABQ
Description 3.3 V 16-bit edge-triggered D-type flip-flop; 3-state 3.3 V 16-bit edge-triggered D-type flip-flop; 3-state 3.3 V 16-bit edge-triggered D-type flip-flop; 3-state 3.3 V 16-bit edge-triggered D-type flip-flop; 3-state 3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
Is it Rohs certified? - - conform to conform to conform to
Maker - - NXP NXP NXP
Parts packaging code - - TSSOP TSSOP QFN
package instruction - - 6.10 MM, PLASTIC, MO-153, SOT362-1, TSSOP-48 6.10 MM, PLASTIC, MO-153, SOT362-1, TSSOP-48 4 X 6 MM, 0.50 MM HEIGHT, PLASTIC, SOT1134-1, HQFN-60
Contacts - - 48 48 60
Reach Compliance Code - - compli compli compli
series - - LVT LVT LVT
JESD-30 code - - R-PDSO-G48 R-PDSO-G48 R-PBCC-B60
length - - 12.5 mm 12.5 mm 6 mm
Load capacitance (CL) - - 50 pF 50 pF 50 pF
Logic integrated circuit type - - BUS DRIVER BUS DRIVER BUS DRIVER
Humidity sensitivity level - - 1 1 2
Number of digits - - 8 8 8
Number of functions - - 2 2 2
Number of ports - - 2 2 2
Number of terminals - - 48 48 60
Maximum operating temperature - - 85 °C 85 °C 85 °C
Minimum operating temperature - - -40 °C -40 °C -40 °C
Output characteristics - - 3-STATE 3-STATE 3-STATE
Output polarity - - TRUE TRUE TRUE
Package body material - - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - - TSSOP TSSOP HVBCC
Package shape - - RECTANGULAR RECTANGULAR RECTANGULAR
Package form - - SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
propagation delay (tpd) - - 5.6 ns 5.6 ns 5.6 ns
Certification status - - Not Qualified Not Qualified Not Qualified
Maximum seat height - - 1.2 mm 1.2 mm 0.5 mm
Maximum supply voltage (Vsup) - - 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) - - 2.7 V 2.7 V 2.7 V
Nominal supply voltage (Vsup) - - 3.3 V 3.3 V 3.3 V
surface mount - - YES YES YES
technology - - BICMOS BICMOS BICMOS
Temperature level - - INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form - - GULL WING GULL WING BUTT
Terminal pitch - - 0.5 mm 0.5 mm 0.5 mm
Terminal location - - DUAL DUAL BOTTOM
width - - 6.1 mm 6.1 mm 4 mm

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