IS27HC010-30WI datasheet, PDF - EEWORLD Datasheet

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IS27HC010-30WI: DescriptionOTP ROM, 128KX8, 30ns, CMOS, PDIP32, 0.600 INCH, PLASTIC, DIP-32; Categorystorage storage; File Size336KB，11 Pages; ManufacturerIntegrated Silicon Solution ( ISSI )

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IS27HC010-30WI Overview

OTP ROM, 128KX8, 30ns, CMOS, PDIP32, 0.600 INCH, PLASTIC, DIP-32

IS27HC010-30WI Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Integrated Silicon Solution ( ISSI )
Parts packaging code	DIP
package instruction	0.600 INCH, PLASTIC, DIP-32
Contacts	32
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	30 ns
JESD-30 code	R-PDIP-T32
JESD-609 code	e0
length	41.91 mm
memory density	1048576 bit
Memory IC Type	OTP ROM
memory width	8
Number of functions	1
Number of terminals	32
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	128KX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	4.572 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15.24 mm

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IS27HC010-30WI Related Products

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Description	OTP ROM, 128KX8, 30ns, CMOS, PDIP32, 0.600 INCH, PLASTIC, DIP-32	UVPROM, 128KX8, 70ns, CMOS, CDIP32, 0.600 INCH, WINDOWED, CERDIP-32	UVPROM, 128KX8, 30ns, CMOS, CDIP32, 0.600 INCH, WINDOWED, CERDIP-32	UVPROM, 128KX8, 30ns, CMOS, CDIP32, 0.600 INCH, WINDOWED, CERDIP-32	OTP ROM, 128KX8, 45ns, CMOS, PDIP32, 0.600 INCH, PLASTIC, DIP-32	OTP ROM, 128KX8, 70ns, CMOS, PDIP32, 0.600 INCH, PLASTIC, DIP-32	UVPROM, 128KX8, 45ns, CMOS, CDIP32, 0.600 INCH, WINDOWED, CERDIP-32	UVPROM, 128KX8, 45ns, CMOS, CDIP32, 0.600 INCH, WINDOWED, CERDIP-32	UVPROM, 128KX8, 70ns, CMOS, CDIP32, 0.600 INCH, WINDOWED, CERDIP-32
Is it lead-free?	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	DIP	DIP	DIP	DIP	DIP	DIP	DIP	DIP	DIP
package instruction	0.600 INCH, PLASTIC, DIP-32	0.600 INCH, WINDOWED, CERDIP-32	0.600 INCH, WINDOWED, CERDIP-32	0.600 INCH, WINDOWED, CERDIP-32	0.600 INCH, PLASTIC, DIP-32	0.600 INCH, PLASTIC, DIP-32	0.600 INCH, WINDOWED, CERDIP-32	0.600 INCH, WINDOWED, CERDIP-32	0.600 INCH, WINDOWED, CERDIP-32
Contacts	32	32	32	32	32	32	32	32	32
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
Maximum access time	30 ns	70 ns	30 ns	30 ns	45 ns	70 ns	45 ns	45 ns	70 ns
JESD-30 code	R-PDIP-T32	R-GDIP-T32	R-GDIP-T32	R-GDIP-T32	R-PDIP-T32	R-PDIP-T32	R-GDIP-T32	R-GDIP-T32	R-GDIP-T32
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0	e0
length	41.91 mm	41.91 mm	41.91 mm	41.91 mm	41.91 mm	41.91 mm	41.91 mm	41.91 mm	41.91 mm
memory density	1048576 bit	1048576 bit	1048576 bit	1048576 bit	1048576 bit	1048576 bit	1048576 bit	1048576 bit	1048576 bit
Memory IC Type	OTP ROM	UVPROM	UVPROM	UVPROM	OTP ROM	OTP ROM	UVPROM	UVPROM	UVPROM
memory width	8	8	8	8	8	8	8	8	8
Number of functions	1	1	1	1	1	1	1	1	1
Number of terminals	32	32	32	32	32	32	32	32	32
word count	131072 words	131072 words	131072 words	131072 words	131072 words	131072 words	131072 words	131072 words	131072 words
character code	128000	128000	128000	128000	128000	128000	128000	128000	128000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	85 °C	85 °C	70 °C	85 °C	85 °C	85 °C	70 °C	85 °C	70 °C
Minimum operating temperature	-40 °C	-40 °C	-	-40 °C	-40 °C	-40 °C	-	-40 °C	-
organize	128KX8	128KX8	128KX8	128KX8	128KX8	128KX8	128KX8	128KX8	128KX8
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	PLASTIC/EPOXY	PLASTIC/EPOXY	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED
encapsulated code	DIP	WDIP	WDIP	WDIP	DIP	DIP	WDIP	WDIP	WDIP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE, WINDOW	IN-LINE, WINDOW	IN-LINE, WINDOW	IN-LINE	IN-LINE	IN-LINE, WINDOW	IN-LINE, WINDOW	IN-LINE, WINDOW
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	4.572 mm	5.715 mm	5.715 mm	5.715 mm	4.572 mm	4.572 mm	5.715 mm	5.715 mm	5.715 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	NO	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	15.24 mm	15.24 mm	15.24 mm	15.24 mm	15.24 mm	15.24 mm	15.24 mm	15.24 mm	15.24 mm
Maker	Integrated Silicon Solution ( ISSI )	-	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )

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