FemtoClock
®
Crystal-to-3.3V LVPECL
Clock Generator
G
ENERAL
D
ESCRIPTION
The 843023 is a Gigabit Ethernet Clock Generator and a member of
the HiPerClocks
TM
family of high performance devices from IDT. The
843023 uses a 25MHz crystal to synthesize 250MHz. The 843023
has excellent phase jitter performance, over the 1.875MHz – 20MHz
integration range. The 843023 is packaged in a small 8-pin TSSOP,
making it ideal for use in systems with limited board space.
843023
DATA SHEET
F
EATURES
•
One differential 3.3V LVPECL output
•
Crystal oscillator interface designed for 25MHz,
18pF parallel resonant crystal
•
Output frequencies: 245MHz – 320MHz
•
VCO range: 490MHz - 640MHz
•
RMS phase jitter @ 250MHz, using a 25MHz crystal
(1.875MHz - 20MHz): 0.39ps (typical)
Offset
Noise Power
100Hz ................-86.3 dBc/Hz
1kHz ..............-114.6 dBc/Hz
10kHz ..............-125.6 dBc/Hz
100kHz .................-126 dBc/Hz
•
3.3V operating supply
•
0°C to 70°C ambient operating temperature
•
Available in lead-free (RoHS 6) package
B
LOCK
D
IAGRAM
OE
25MHz
XTAL_IN
P
IN
A
SSIGNMENT
V
CC
XTAL_OUT
XTAL_IN
V
EE
1
2
3
4
8
7
6
5
Q
nQ
V
CC
OE
OSC
XTAL_OUT
Phase
Detector
VCO
÷2
(fixed)
Q
nQ
843023
÷20
(fixed)
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm
package body
G Package
Top View
843023 REVISION A 10/1/15
1
©2015 Integrated Device Technology, Inc.
843023 DATA SHEET
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1, 6
2, 3
4
5
7, 8
Name
V
CC
XTAL_OUT,
XTAL_IN
V
EE
OE
nQ, Q
Type
Power
Input
Power
Input
Output
Pullup
Description
Positive supply pin.
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
Negative supply pin.
Active high output enable. When logic HIGH, the outputs are enabled and
active. When logic LOW, the outputs are disabled and the device is in the
power down mode. LVCMOS/LVTTL interface levels.
Differential clock outputs. LVPECL interface levels.
Pullup
refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
R
PULLUP
Parameter
Input Capacitance
Input Pullup Resistor
Test Conditions
Minimum
Typical
4
51
Maximum
Units
pF
kΩ
FEMTOCLOCKS
®
CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
2
REVISION A 10/1/15
I843023 DATA SHEET
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
101.7°C/W (0 mps)
-65°C to 150°C
N OT E : S t r e s s e s b eyo n d t h o s e l i s t e d u n d e r A b s o l u t e
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics
or
AC Characteristics
is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
T
ABLE
3A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
=0°C
TO
70°C
Symbol
V
CC
V
CCA
I
EE
Parameter
Positive Supply Voltage
Analog Supply Voltage
Power Supply Current
Test Conditions
Minimum
3.135
3.135
Typical
3.3
3.3
Maximum
3.465
3.465
75
Units
V
V
mA
T
ABLE
4B. LVCMOS/LVTTL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
OE
OE
V
CC
= V
IN
= 3.465V
V
CC
= 3.465V, V
IN
= 0V
-150
Test Conditions
Minimum
2
-0.3
Typical
Maximum
V
CC
+ 0.3
0.8
5
Units
V
V
µA
µA
T
ABLE
3C. LVPECL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
=0°C
TO
70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
- 1.4
V
CC
- 2.0
0.6
Typical
Maximum
V
CC
- 0.9
V
CC
- 1.7
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50Ω to V
CC
- 2V.
T
ABLE
4. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
24.5
Test Conditions
Minimum
Typical
Fundamental
32
50
7
1
MHz
Ω
pF
mW
Maximum
Units
T
ABLE
5. AC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
=0°C
TO
70°C
Symbol
f
OUT
tjit(Ø)
t
R
/ t
F
odc
Parameter
Output Frequency
RMS Phase Jitter (Random);
NOTE 1
Output Rise/Fall Time
Output Duty Cycle
Integration Range: 1.875MHz - 20MHz
20% to 80%
300
47
Test Conditions
Minimum
245
0.39
600
53
Typical
Maximum
320
Units
MHz
ps
ps
%
NOTE 1: Please refer to the Phase Noise Plot.
REVISION A 10/1/15
3
FEMTOCLOCKS
®
CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
843023 DATA SHEET
0
-10
-20
-30
-40
-50
T
YPICAL
P
HASE
N
OISE AT
250MH
Z
(3.3V)
➤
Gigabit Ethernet Filter
250MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.39ps (typical)
N
OISE
P
OWER
dBc
Hz
-60
-70
-80
-90
-100
Raw Phase Noise Data
➤
-110
-120
-130
-140
-150
-170
-180
-190
100
1k
10k
➤
-160
Phase Noise Result by adding
Gigabit Ethernet Filter to raw data
100k
1M
10M
100M
500M
O
FFSET
F
REQUENCY
(H
Z
)
FEMTOCLOCKS
®
CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
4
REVISION A 10/1/15
I843023 DATA SHEET
P
ARAMETER
M
EASUREMENT
I
NFORMATION
3.3V O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
RMS P
HASE
J
ITTER
O
UTPUT
D
UTY
C
YCLE
/P
ULSE
W
IDTH
/P
ERIOD
O
UTPUT
R
ISE
/F
ALL
T
IME
REVISION A 10/1/15
5
FEMTOCLOCKS
®
CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR