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IP3348CX5; IP3348CX10;
IP3348CX15; IP3348CX20
Integrated multi channel LC-filter network for high-speed data
interfaces with ESD protection to IEC 61000-4-2 level 4
Rev. 1.1 — 4 April 2011
Product data sheet
1. Product profile
1.1 General description
IP3348CX5, IP3348CX10, IP3348CX15 and IP3348CX20 is a 2, 4, 6 and 8-channel LC
low-pass filter network for high-speed data interfaces. It is designed to provide filtering of
undesired RF signals in the 800 MHz to 3 GHz frequency band while supporting data
rates up to 400 Mbit/s. In addition, IP3348CX5, IP3348CX10, IP3348CX15 and
IP3348CX20 incorporates diodes to provide protection to downstream components from
ElectroStatic Discharge (ESD) voltages as high as
±20
kV contact discharge according
the IEC 61000-4-2 model, far exceeding standard level 4.
The devices are fabricated using monolithic silicon technology and integrate up to
8 inductors and up to 8 pairs of back-to-back diodes in a 0.4 mm pitch Wafer-Level
Chip-Scale Package (WLCSP). These features make the IP3348CX5; IP3348CX10;
IP3348CX15; IP3348CX20 ideal for use in applications requiring the utmost in
miniaturization such as mobile phone handsets, cordless telephones and other portable
electronic devices.
1.2 Features and benefits
Pb-free, RoHS compliant and free of halogen and antimony (Dark Green compliant)
Supports data rates up to 400 Mbit/s
Integrated ESD protection withstanding
±20
kV contact discharge, far exceeding
IEC 61000-4-2 level 4
WLCSP with 0.4 mm pitch
1.3 Applications
ElectroMagnetic Interference (EMI) filtering and ESD protection for high-speed data
interfaces like Mobile Industry Processor Interface (MIPI) and Mobile Display Digital
Interface (MDDI)
Camera imager interface
High resolution color Liquid Crystal Display (LCD) interfaces
NXP Semiconductors
IP3348CX5/CX10/CX15/CX20
Multi channel LC-filter network for high-speed data interfaces
2. Pinning information
2.1 Pinning
bump A1
index area
1
A
B
C
001aak061
bump A1
index area
2
A
B1
B
C
001aak062
1
2
3
4
B1
B2
transparent top view,
solder balls facing down
transparent top view,
solder balls facing down
Fig 1.
Pin configuration IP3348CX5
bump A1
index area
1
A
B
C
001aak063
Fig 2.
Pin configuration IP3348CX10
bump A1
index area
2
3
4
5
6
A
B1
B2
B3
B
C
001aak064
1
2
3
4
5
6
7
8
B1
B2
B3
B4
transparent top view,
solder balls facing down
transparent top view,
solder balls facing down
Fig 3.
Pin configuration IP3348CX15
Fig 4.
Pin configuration IP3348CX20
2.2 Pin description
Table 1.
Pin
IP3348CX5
A1 and C1
A2 and C2
-
-
-
-
-
-
B1
IP3348CX10
A1 and C1
A2 and C2
A3 and C3
A4 and C4
-
-
-
-
B1 and B2
IP3348CX15
A1 and C1
A2 and C2
A3 and C3
A4 and C4
A5 and C5
A6 and C6
-
-
B1, B2 and B3
IP3348CX20
A1 and C1
A2 and C2
A3 and C3
A4 and C4
A5 and C5
A6 and C6
A7 and C7
A8 and C8
B1, B2, B3 and B4
filter channel 1
filter channel 2
filter channel 3
filter channel 4
filter channel 5
filter channel 6
filter channel 7
filter channel 8
ground
Pinning
Description
IP3348CX5_CX10_CX15_CX20
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1.1 — 4 April 2011
2 of 16
NXP Semiconductors
IP3348CX5/CX10/CX15/CX20
Multi channel LC-filter network for high-speed data interfaces
3. Ordering information
Table 2.
Ordering information
Package
Name
IP3348CX5
IP3348CX10
IP3348CX15
IP3348CX20
WLCSP5
WLCSP10
WLCSP15
WLCSP20
Description
wafer level chip-size package; 5 bumps (2-1-2)
wafer level chip-size package; 10 bumps (4-2-4)
wafer level chip-size package; 15 bumps (6-3-6)
wafer level chip-size package; 20 bumps (8-4-8)
Version
IP3348CX5
IP3348CX10
IP3348CX15
IP3348CX20
Type number
4. Functional diagram
A1 to A8
C1 to C8
B1 to B4
008aaa252
Fig 5.
Schematic diagram of IP3348CX5; IP3348CX10; IP3348CX15; IP3348CX20
5. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
I
I
ch
V
ESD
Parameter
input voltage
channel current (DC)
electrostatic discharge voltage
T
amb
= 85
°C
all pins to ground
contact discharge; 10 pulses
air discharge
IEC 61000-4-2 level 4; all pins
to ground
contact discharge
air discharge
P
ch
T
stg
T
reflow(peak)
T
amb
[1]
[1]
Conditions
Min
−4
-
−20
−20
Max
+4
20
+20
+20
Unit
V
mA
kV
kV
−8
−15
-
−55
-
−40
+8
+15
10
+150
260
+85
kV
kV
mW
°C
°C
°C
channel power dissipation
storage temperature
peak reflow temperature
ambient temperature
continuous; T
amb
= 85
°C
10 s maximum
Device is qualified with 1000 pulses of
±15
kV contact discharges each, according to the IEC 61000-4-2 model and far exceeds the
specified level 4 (8 kV contact discharge).
IP3348CX5_CX10_CX15_CX20
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1.1 — 4 April 2011
3 of 16
NXP Semiconductors
IP3348CX5/CX10/CX15/CX20
Multi channel LC-filter network for high-speed data interfaces
6. Characteristics
Table 4.
Channel characteristics
T
amb
= 25
°
C; unless otherwise specified.
Symbol Parameter
R
s(ch)
L
s(ch)
C
ch
channel series resistance
channel series inductance
channel capacitance
f = 100 kHz
V
bias(DC)
= 0 V
V
bias(DC)
= 2.5 V
V
BR
I
LR
breakdown voltage
reverse leakage current
I
test
= 1 mA
I
test
=
−1
mA
per channel; V
I
= 3 V
per channel; V
I
=
−3
V
[1]
Guaranteed by design.
[1]
[1]
Conditions
Min
-
-
-
-
5
−10
-
−100
Typ
10
15
30
25
-
-
10
−10
Max
-
-
-
-
10
−5
100
-
Unit
Ω
nH
pF
pF
V
V
nA
nA
Table 5.
Frequency characteristics
T
amb
= 25
°
C; unless otherwise specified.
Symbol Parameter
α
il
insertion loss
Conditions
R
gen
= 50
Ω;
R
L
= 50
Ω
800 MHz < f
i
< 1 GHz
1 GHz < f
i
< 3 GHz
f
i
= 0 Hz; V
bias(DC)
= 0 V
f
−3dB
α
ct
[1]
Min
25
30
-
[1]
Typ
-
40
-
350
-
Max
-
-
1
-
-
Unit
dB
dB
dB
MHz
dB
cut-off frequency
crosstalk attenuation
R
gen
= 50
Ω;
R
L
= 50
Ω
R
gen
= 50
Ω;
R
L
= 50
Ω;
800 MHz < f
i
< 3 GHz
-
35
Measured relative to insertion loss at DC.
IP3348CX5_CX10_CX15_CX20
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1.1 — 4 April 2011
4 of 16
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