Philips Semiconductors
Product specification
Quad 2-input Exclusive-OR gate
74F86
FEATURE
•
Industrial temperature range available (–40°C to +85°C)
TYPE
TYPICAL
PROPAGATION
DELAY
4.3ns
TYPICAL SUPPLY
CURRENT
(TOTAL)
16.5mA
PIN CONFIGURATION
D0a
D0b
Q0
D1a
D1b
Q1
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
D3b
D3a
Q3
D2b
D2a
Q2
74F86
SF00038
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
14-pin plastic DIP
14-pin plastic SO
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
N74F86N
N74F86D
INDUSTRIAL RANGE
V
CC
= 5V
±10%,
T
amb
= –40°C to +85°C
I74F86N
I74F86D
PKG DWG #
SOT27-1
SOT108-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
Dna, Dnb
Qn
DESCRIPTION
Data inputs
Data output
74F (U.L.) HIGH/LOW
1.0/1.0
50/33
LOAD VALUE HIGH/LOW
20µA/0.6mA
1.0mA/20mA
NOTE:
1. One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC DIAGRAM
D0a
D0b
D1a
D1b
D2a
D2b
V
CC
= Pin 14
GND = Pin 7
D3a
D3b
1
2
4
5
9
10
12
13
11
3
Q0
FUNCTION TABLE
INPUTS
Dna
L
L
8
Q2
OUTPUT
Dnb
L
H
L
H
Qn
L
H
H
L
6
Q1
H
H
NOTES:
H = High voltage level
L = Low voltage level
Q3
SF00090
LOGIC SYMBOL
1
2
4
5
9
10 12 13
IEC/IEEE SYMBOL
1
2
=
3
D0a D0bD1a D1b D2a D2b D3a D3b
4
6
5
Q0 Q1 Q2 Q3
9
8
V
CC
= Pin 14
GND = Pin 7
10
3
6
8
11
SF00040
12
11
13
SF00091
February 9, 1990
2
853–0336 98773
Philips Semiconductors
Product specification
Quad 2-input Exclusive-OR gate
74F86
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Commercial range
Operating free-air temperature range
free air
Storage temperature range
Industrial range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
40
0 to +70
–40 to +85
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
°C
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
T
amb
b
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Commercial range
Operating free-air tem erature range
temperature
O erating
Industrial range
0
–40
PARAMETER
MIN
4.5
2.0
0.8
–18
–1
20
+70
+85
NOM
5.0
MAX
5.5
UNIT
V
V
V
mA
mA
mA
°C
°C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
MIN
V
O
OH
High-level
High level output voltage
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OH
= MAX
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OL
= MAX
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX
I
CCH
I
CCL
V
CC
= MAX
V
CC
= MAX
D0a = GND,
D0b = 4.5V
V
IN
= 4.5V
-60
15
18
±10%V
CC
±5%V
CC
±10%V
CC
±5%V
CC
2.5
2.7
3.4
0.30
0.30
-0.73
0.50
0.50
–1.2
100
20
–0.6
–150
23
28
LIMITS
TYP
2
MAX
V
V
V
V
V
µA
µA
mA
mA
mA
mA
UNIT
V
O
OL
V
IK
I
I
I
IH
I
IL
I
OS
I
CC
Low-level
Low level output voltage
Input clamp voltage
Input current at maximum input voltage
High-level input current
Low-level input current
Short-circuit output current
3
y
)
Supply current (
(total)
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
February 9, 1990
3
Philips Semiconductors
Product specification
Quad 2-input Exclusive-OR gate
74F86
AC ELECTRICAL CHARACTERISTICS
LIMITS
TEST
CONDITION
V
CC
= +5.0V
T
amb
= +25°C
C
L
= 50pF
R
L
= 500Ω
MIN
t
PLH
t
PHL
t
PLH
t
PHL
Propagation delay
Dna or Dnb to Qn
(other input Low)
Propagation delay
Dna or Dnb to Qn
(other input High)
Waveform 1
3.0
3.0
3.5
3.0
TYP
4.0
4.2
5.3
4.7
MAX
5.5
5.5
7.0
6.5
V
CC
= +5.0V
±
10%
T
amb
= 0°C to +70°C
C
L
= 50pF
R
L
= 500Ω
MIN
3.0
3.0
3.5
3.0
MAX
6.5
6.5
8.0
7.5
V
CC
= +5.0V
±
10%
T
amb
= –40°C to +85°C
C
L
= 50pF
R
L
= 500Ω
MIN
3.0
2.5
3.5
3.0
MAX
7.0
8.0
10.0
8.0
ns
SYMBOL
PARAMETER
UNIT
Waveform 2
ns
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
V
IN
V
M
t
PLH
V
M
t
PHL
V
IN
V
M
t
PHL
V
M
t
PLH
V
OUT
V
M
V
M
V
OUT
V
M
V
M
SF00092
SF00093
Waveform 1. Propagation Delay for Non-Inverting Outputs
Waveform 2. Propagation Delay for Inverting Outputs
TEST CIRCUIT AND WAVEFORMS
V
CC
NEGATIVE
PULSE
V
IN
PULSE
GENERATOR
R
T
D.U.T.
V
OUT
90%
V
M
10%
t
THL (
t
f
)
C
L
R
L
t
w
V
M
10%
t
TLH (
t
r
)
0V
90%
AMP (V)
t
TLH (
t
r
)
90%
POSITIVE
PULSE
V
M
10%
t
w
t
THL (
t
f
)
AMP (V)
90%
V
M
10%
0V
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
Input Pulse Definition
INPUT PULSE REQUIREMENTS
family
amplitude V
M
74F
3.0V
1.5V
rep. rate
1MHz
t
w
500ns
t
TLH
2.5ns
t
THL
2.5ns
SF00006
February 9, 1990
4
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