MT9HVF6472Y-53EXX datasheet, PDF

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MT9HVF6472Y-53EXX: DescriptionDDR DRAM Module, 64MX72, CMOS, LEAD FREE, DIMM-240; Categorystorage storage; File Size229KB，16 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

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MT9HVF6472Y-53EXX Overview

DDR DRAM Module, 64MX72, CMOS, LEAD FREE, DIMM-240

MT9HVF6472Y-53EXX Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Micron Technology
Parts packaging code	DIMM
package instruction	DIMM,
Contacts	240
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	SINGLE BANK PAGE BURST
Other features	AUTO/SELF REFRESH
JESD-30 code	R-XDMA-N240
JESD-609 code	e4
memory density	4831838208 bit
Memory IC Type	DDR DRAM MODULE
memory width	72
Number of functions	1
Number of ports	1
Number of terminals	240
word count	67108864 words
character code	64000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature
organize	64MX72
Package body material	UNSPECIFIED
encapsulated code	DIMM
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
self refresh	YES
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	NO
technology	CMOS
Temperature level	OTHER
Terminal surface	Gold (Au)
Terminal form	NO LEAD
Terminal location	DUAL
Maximum time at peak reflow temperature	30

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256MB, 512MB, 1GB (x72, SR): 240-Pin DDR2 SDRAM VLP RDIMM

Features

DDR2 SDRAM VLP Registered DIMM

MT9HVF3272(P) – 256MB

MT9HVF6472(P) – 512MB

MT9HVF12872(P) – 1GB

For component data sheets, refer to Micron’s Web site:

www.micron.com/products

Features

• 240-pin, registered dual in-line memory module,

very low profile, ATCA form factor

• Fast data transfer rates: PC2-3200, PC2-4200,

PC2-5300, or PC2-6400

• Supports ECC error detection and correction

• V

= V

Q = +1.8V

• V

DDSPD

= +1.7V to +3.6V

• JEDEC-standard 1.8V I/O (SSTL_18-compatible)

• Differential data strobe (DQS, DQS#) option

• 4n-bit prefetch architecture

• DLL to align DQ and DQS transitions with CK

• Single rank

• Multiple internal device banks for concurrent

operation

• Programmable CAS# latency (CL)

• Posted CAS# additive latency (AL)

• WRITE latency = READ latency - 1

• Programmable burst lengths (BL): 4 or 8

• Adjustable data-output drive strength

• 64ms, 8,192-cycle refresh

• On-die termination (ODT)

• Serial presence-detect (SPD) with EEPROM

• Gold edge contacts

Figure 1:

240-Pin RDIMM (ATCA form factor)

Height: 17.9mm (0.70in)

Options

• Parity

• Package

–

240-pin DIMM (lead-free)

• Frequency/CAS latency

–

2.5ns @ CL = 5 (DDR2-800)

–

2.5ns @ CL = 6 (DDR2-800)

–

3.0ns @ CL = 5 (DDR2-667)

–

3.75ns @ CL = 4 (DDR2-533)

–

5.0ns @ CL = 3 (DDR2-400)

• PCB height

–

17.9mm (0.70in)

Marking

-80E

-800

-667

-53E

-40E

Notes: 1. CL = CAS (READ) latency; registered mode

will add one clock cycle to CL.

2. Not available in 256MB module density.

Table 1:

Speed

Grade

-80E

-800

-667

-53E

-40E

Key Timing Parameters

Industry

Nomenclature

PC2-6400

PC2-5300

PC2-4200

PC2-3200

Data Rate (MT/s)

CL = 6

–

800

–

CL = 5

800

667

–

CL = 4

533

400

CL = 3

–

400

RCD

(ns)

12.5

(ns)

12.5

(ns)

PDF: 09005aef81de9391/Source: 09005aef81de9385

HVF9C32_64_128x72.fm - Rev. D 06/08 EN

Micron Technology, Inc., reserves the right to change products or specifications without notice.

Products and specifications discussed herein are subject to change by Micron without notice.

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