P82586-10 datasheet, PDF - EEWORLD Datasheet

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P82586-10: DescriptionLAN Controller, 1 Channel(s), 1.25MBps, NMOS, PDIP48, DIP-48; CategoryThe embedded processor and controller Microcontrollers and processors; File Size2MB，37 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

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P82586-10 Overview

LAN Controller, 1 Channel(s), 1.25MBps, NMOS, PDIP48, DIP-48

P82586-10 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	DIP
package instruction	DIP, DIP48,.6
Contacts	48
Reach Compliance Code	unknow
Other features	MICROINSTRUCTION ROM; ON-CHIP MEMORY MANAGEMENT
Address bus width	24
boundary scan	NO
Bus compatibility	80186; 80188
maximum clock frequency	10 MHz
letter of agreement	SYNC, HDLC
Data encoding/decoding methods	NRZ; BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate	1.25 MBps
External data bus width	16
JESD-30 code	R-PDIP-T48
JESD-609 code	e0
length	61.79 mm
low power mode	NO
Number of DMA channels	4
Number of I/O lines
Number of serial I/Os	1
Number of terminals	48
On-chip data RAM width
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP48,.6
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Certification status	Not Qualified
RAM (number of words)	0
Maximum seat height	5.08 mm
Maximum slew rate	550 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	NMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	15.24 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, LAN
Base Number Matches	1

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P82586-10 Related Products

	P82586-10	N82586-10	C82586-10	C82586-6	P82586-6	N82586-6
Description	LAN Controller, 1 Channel(s), 1.25MBps, NMOS, PDIP48, DIP-48	LAN Controller, 1 Channel(s), 1.25MBps, NMOS, PQCC68, PLASTIC, LCC-68	LAN Controller, 1 Channel(s), 1.25MBps, NMOS, CDIP48, DIP-48	LAN Controller, 1 Channel(s), 1.25MBps, NMOS, CDIP48, DIP-48	LAN Controller, 1 Channel(s), 1.25MBps, NMOS, PDIP48, DIP-48	LAN Controller, 1 Channel(s), 1.25MBps, NMOS, PQCC68, PLASTIC, LCC-68
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	DIP	LCC	DIP	DIP	DIP	LCC
package instruction	DIP, DIP48,.6	QCCJ, LDCC68,1.0SQ	WDIP, DIP48,.6	WDIP, DIP48,.6	DIP, DIP48,.6	QCCJ, LDCC68,1.0SQ
Contacts	48	68	48	48	48	68
Reach Compliance Code	unknow	unknow	unknow	compliant	compliant	compliant
Other features	MICROINSTRUCTION ROM; ON-CHIP MEMORY MANAGEMENT	MICROINSTRUCTION ROM; ON-CHIP MEMORY MANAGEMENT	MICROINSTRUCTION ROM; ON-CHIP MEMORY MANAGEMENT	MICROINSTRUCTION ROM; ON-CHIP MEMORY MANAGEMENT	MICROINSTRUCTION ROM; ON-CHIP MEMORY MANAGEMENT	MICROINSTRUCTION ROM; ON-CHIP MEMORY MANAGEMENT
Address bus width	24	24	24	24	24	24
boundary scan	NO	NO	NO	NO	NO	NO
Bus compatibility	80186; 80188	80186; 80188	80186; 80188	80186; 80188	80186; 80188	80186; 80188
maximum clock frequency	10 MHz	10 MHz	10 MHz	6 MHz	6 MHz	6 MHz
letter of agreement	SYNC, HDLC	SYNC, HDLC	SYNC, HDLC	SYNC, HDLC	SYNC, HDLC	SYNC, HDLC
Data encoding/decoding methods	NRZ; BIPH-LEVEL(MANCHESTER)	NRZ; BIPH-LEVEL(MANCHESTER)	NRZ; BIPH-LEVEL(MANCHESTER)	NRZ; BIPH-LEVEL(MANCHESTER)	NRZ; BIPH-LEVEL(MANCHESTER)	NRZ; BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate	1.25 MBps	1.25 MBps	1.25 MBps	1.25 MBps	1.25 MBps	1.25 MBps
External data bus width	16	16	16	16	16	16
JESD-30 code	R-PDIP-T48	S-PQCC-J68	R-CDIP-T48	R-CDIP-T48	R-PDIP-T48	S-PQCC-J68
JESD-609 code	e0	e0	e0	e0	e0	e0
length	61.79 mm	24.2 mm	60.96 mm	60.96 mm	61.79 mm	24.2 mm
low power mode	NO	NO	NO	NO	NO	NO
Number of DMA channels	4	4	4	4	4	4
Number of serial I/Os	1	1	1	1	1	1
Number of terminals	48	68	48	48	48	68
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	QCCJ	WDIP	WDIP	DIP	QCCJ
Encapsulate equivalent code	DIP48,.6	LDCC68,1.0SQ	DIP48,.6	DIP48,.6	DIP48,.6	LDCC68,1.0SQ
Package shape	RECTANGULAR	SQUARE	RECTANGULAR	RECTANGULAR	RECTANGULAR	SQUARE
Package form	IN-LINE	CHIP CARRIER	IN-LINE, WINDOW	IN-LINE, WINDOW	IN-LINE	CHIP CARRIER
power supply	5 V	5 V	5 V	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	5.08 mm	4.83 mm	5.51 mm	5.51 mm	5.08 mm	4.83 mm
Maximum slew rate	550 mA	550 mA	550 mA	550 mA	550 mA	550 mA
Maximum supply voltage	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	YES	NO	NO	NO	YES
technology	NMOS	NMOS	NMOS	NMOS	NMOS	NMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	J BEND	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	J BEND
Terminal pitch	2.54 mm	1.27 mm	2.54 mm	2.54 mm	2.54 mm	1.27 mm
Terminal location	DUAL	QUAD	DUAL	DUAL	DUAL	QUAD
width	15.24 mm	24.2 mm	15.24 mm	15.24 mm	15.24 mm	24.2 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, LAN	SERIAL IO/COMMUNICATION CONTROLLER, LAN	SERIAL IO/COMMUNICATION CONTROLLER, LAN	SERIAL IO/COMMUNICATION CONTROLLER, LAN	SERIAL IO/COMMUNICATION CONTROLLER, LAN	SERIAL IO/COMMUNICATION CONTROLLER, LAN
Base Number Matches	1	1	1	1	-	-

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