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74AHCT1G08DCKTE4

Description
Logic Gates Single 2-Input Positive-AND Gate
Categorylogic    logic   
File Size570KB,13 Pages
ManufacturerTexas Instruments
Websitehttp://www.ti.com.cn/
Environmental Compliance
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74AHCT1G08DCKTE4 Overview

Logic Gates Single 2-Input Positive-AND Gate

74AHCT1G08DCKTE4 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerTexas Instruments
Parts packaging codeSOIC
package instructionTSSOP, TSSOP5/6,.08
Contacts5
Reach Compliance Codeunknown
seriesAHCT/VHCT/VT
JESD-30 codeR-PDSO-G5
JESD-609 codee4
length2 mm
Logic integrated circuit typeAND GATE
MaximumI(ol)0.008 A
Humidity sensitivity level1
Number of functions1
Number of entries2
Number of terminals5
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP5/6,.08
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply5 V
Prop。Delay @ Nom-Sup9 ns
propagation delay (tpd)9 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width1.25 mm
Base Number Matches1

74AHCT1G08DCKTE4 Related Products

74AHCT1G08DCKTE4 74AHCT1G08DBVTG4
Description Logic Gates Single 2-Input Positive-AND Gate Logic Gates Sgl 2-Input Pos-AND Gate
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker Texas Instruments Texas Instruments
Parts packaging code SOIC SOT-23
package instruction TSSOP, TSSOP5/6,.08 LSSOP, TSOP5/6,.11,37
Contacts 5 5
Reach Compliance Code unknown compli
series AHCT/VHCT/VT AHCT/VHCT/VT
JESD-30 code R-PDSO-G5 R-PDSO-G5
JESD-609 code e4 e4
length 2 mm 2.9 mm
Logic integrated circuit type AND GATE AND GATE
MaximumI(ol) 0.008 A 0.008 A
Humidity sensitivity level 1 1
Number of functions 1 1
Number of entries 2 2
Number of terminals 5 5
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Output characteristics 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP LSSOP
Encapsulate equivalent code TSSOP5/6,.08 TSOP5/6,.11,37
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
method of packing TAPE AND REEL TAPE AND REEL
Peak Reflow Temperature (Celsius) 260 260
power supply 5 V 5 V
propagation delay (tpd) 9 ns 9 ns
Certification status Not Qualified Not Qualified
Schmitt trigger NO NO
Maximum seat height 1.1 mm 1.45 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form GULL WING GULL WING
Terminal pitch 0.65 mm 0.95 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
width 1.25 mm 1.6 mm
Base Number Matches 1 1

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