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SN74AUP2G125RSER

Description
Low-Power Dual Bus Buffer Gate With 3-State Outputs 8-UQFN -40 to 85
Categorylogic    logic   
File Size1MB,26 Pages
ManufacturerTexas Instruments
Websitehttp://www.ti.com.cn/
Environmental Compliance
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SN74AUP2G125RSER Overview

Low-Power Dual Bus Buffer Gate With 3-State Outputs 8-UQFN -40 to 85

SN74AUP2G125RSER Parametric

Parameter NameAttribute value
Brand NameTexas Instruments
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeQFN
package instructionVQCCN, LCC8,.06SQ,20
Contacts8
Reach Compliance Codecompli
ECCN codeEAR99
Factory Lead Time6 weeks
Control typeENABLE LOW
Counting directionUNIDIRECTIONAL
seriesAUP/ULP/V
JESD-30 codeS-PQCC-N8
JESD-609 codee4
length1.5 mm
Load capacitance (CL)30 pF
Logic integrated circuit typeBUS DRIVER
MaximumI(ol)0.004 A
Humidity sensitivity level1
Number of digits1
Number of functions2
Number of ports2
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeVQCCN
Encapsulate equivalent codeLCC8,.06SQ,20
Package shapeSQUARE
Package formCHIP CARRIER, VERY THIN PROFILE
method of packingTR
Peak Reflow Temperature (Celsius)260
power supply1.2/3.3 V
Maximum supply current (ICC)0.0009 mA
Prop。Delay @ Nom-Su31.1 ns
propagation delay (tpd)4.6 ns
Certification statusNot Qualified
Maximum seat height0.6 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)0.8 V
Nominal supply voltage (Vsup)1.1 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceNickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
translateN/A
width1.5 mm
Base Number Matches1

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Description Low-Power Dual Bus Buffer Gate With 3-State Outputs 8-UQFN -40 to 85 Low-Power Dual Bus Buffer Gate With 3-State Outputs 8-VSSOP -40 to 85 Low-Power Dual Bus Buffer Gate With 3-State Outputs 8-X2SON -40 to 85 Low-Power Dual Bus Buffer Gate With 3-State Outputs 8-DSBGA -40 to 85 Low-Power Dual Bus Buffer Gate With 3-State Outputs 8-DSBGA -40 to 85
Brand Name Texas Instruments Texas Instruments Texas Instruments Texas Instruments Texas Instruments
Is it lead-free? Lead free Lead free Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to conform to conform to
Parts packaging code QFN SOIC SON BGA BGA
package instruction VQCCN, LCC8,.06SQ,20 VSSOP, TSSOP8,.12,20 VSON, SOLCC8,.04,14 VFBGA, BGA8,2X4,20 VFBGA, BGA8,2X4,16
Contacts 8 8 8 8 8
Reach Compliance Code compli compli compli compli compli
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99
Factory Lead Time 6 weeks 6 weeks 6 weeks 1 week 1 week
Control type ENABLE LOW ENABLE LOW ENABLE LOW ENABLE LOW ENABLE LOW
Counting direction UNIDIRECTIONAL UNIDIRECTIONAL UNIDIRECTIONAL UNIDIRECTIONAL UNIDIRECTIONAL
series AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V
JESD-30 code S-PQCC-N8 R-PDSO-G8 R-PDSO-N8 R-PBGA-B8 R-PBGA-B8
JESD-609 code e4 e4 e4 e1 e1
length 1.5 mm 2.3 mm 1.4 mm 1.9 mm 1.57 mm
Load capacitance (CL) 30 pF 30 pF 30 pF 30 pF 30 pF
Logic integrated circuit type BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER
MaximumI(ol) 0.004 A 0.004 A 0.004 A 0.004 A 0.004 A
Humidity sensitivity level 1 1 1 1 1
Number of digits 1 1 1 1 1
Number of functions 2 2 2 2 2
Number of ports 2 2 2 2 2
Number of terminals 8 8 8 8 8
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Output polarity TRUE TRUE TRUE TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code VQCCN VSSOP VSON VFBGA VFBGA
Encapsulate equivalent code LCC8,.06SQ,20 TSSOP8,.12,20 SOLCC8,.04,14 BGA8,2X4,20 BGA8,2X4,16
Package shape SQUARE RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form CHIP CARRIER, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH SMALL OUTLINE, VERY THIN PROFILE GRID ARRAY, VERY THIN PROFILE, FINE PITCH GRID ARRAY, VERY THIN PROFILE, FINE PITCH
method of packing TR TR TR TR TR
Peak Reflow Temperature (Celsius) 260 260 260 260 260
power supply 1.2/3.3 V 1.2/3.3 V 1.2/3.3 V 1.2/3.3 V 1.2/3.3 V
Maximum supply current (ICC) 0.0009 mA 0.0009 mA 0.0009 mA 0.0009 mA 0.0009 mA
Prop。Delay @ Nom-Su 31.1 ns 31.1 ns 31.1 ns 31.1 ns 31.1 ns
propagation delay (tpd) 4.6 ns 4.6 ns 31.1 ns 4.6 ns 4.6 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 0.6 mm 0.9 mm 0.4 mm 0.5 mm 0.5 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V
Nominal supply voltage (Vsup) 1.1 V 1.1 V 1.2 V 1.1 V 1.1 V
surface mount YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form NO LEAD GULL WING NO LEAD BALL BALL
Terminal pitch 0.5 mm 0.5 mm 0.35 mm 0.5 mm 0.4 mm
Terminal location QUAD DUAL DUAL BOTTOM BOTTOM
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
translate N/A N/A N/A N/A N/A
width 1.5 mm 2 mm 1 mm 0.9 mm 0.77 mm
Maker - Texas Instruments - Texas Instruments Texas Instruments
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