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NLAST4051QSG

Description
8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16, QSOP-16
CategoryAnalog mixed-signal IC    The signal circuit   
File Size148KB,12 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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NLAST4051QSG Overview

8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16, QSOP-16

NLAST4051QSG Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerON Semiconductor
Parts packaging codeSOIC
package instructionSSOP,
Contacts16
Reach Compliance Codecompliant
Analog Integrated Circuits - Other TypesSINGLE-ENDED MULTIPLEXER
JESD-30 codeR-PDSO-G16
length4.9 mm
Maximum negative supply voltage (Vsup)-5.5 V
Negative supply voltage minimum (Vsup)
Nominal Negative Supply Voltage (Vsup)-3 V
Number of channels8
Number of functions1
Number of terminals16
Nominal off-state isolation93 dB
On-state resistance matching specifications15 Ω
Maximum on-state resistance (Ron)37 Ω
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2.5 V
Nominal supply voltage (Vsup)3 V
surface mountYES
Maximum disconnect time28 ns
Maximum connection time28 ns
technologyCMOS
Temperature levelMILITARY
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9116 mm
NLAST4051
Analog Multiplexer/
Demultiplexer
TTL Compatible, Single−Pole, 8−Position
Plus Common Off
http://onsemi.com
The NLAST4051 is an improved version of the MC14051 and
MC74HC4051 fabricated in sub−micron Silicon Gate CMOS technology
for lower R
DS(on)
resistance and improved linearity with low current.
This device may be operated either with a single supply or dual supply up
to
±3
V to pass a 6 V
PP
signal without coupling capacitors.
When operating in single supply mode, it is only necessary to tie
V
EE
, pin 7 to ground. For dual supply operation, V
EE
is tied to a
negative voltage, not to exceed maximum ratings. Translation is
provided in the device, the Address and Inhibit are standard TTL level
compatible. For CMOS compatibility see NLAS4051. Pin for pin
compatible with all industry standard versions of ‘4051.’
Features
MARKING
DIAGRAMS
16
SOIC−16
D SUFFIX
CASE 751B
1
1
NLAST4051
AWLYWW
16
TSSOP−16
DT SUFFIX
CASE 948F
1
1
AST
4051
ALYWG
G
Improved R
DS(on)
Specifications
Pin for Pin Replacement for MAX4051 and MAX4051A
− One Half the Resistance Operating at 5.0 V
Single or Dual Supply Operation
− Single 3.0 − 5.0 V Operation, or Dual
±3
V Operation
− With V
CC
of 3.0 to 3.3 V, Device Can Interface with 1.8 V Logic,
No Translators Needed
− Address and Inhibit Logic are Over−Voltage Tolerant and May Be
Driven Up +6 V Regardless of V
CC
Address and Inhibit Pins Standard TTL Compatible
− Greatly Improved Noise Margin Over MAX4051 and MAX4051A
− True TTL Compatibility V
IL
= 0.8 V, V
IH
= 2.0 V
Improved Linearity Over Standard HC4051 Devices
Popular SOIC, and Space Saving TSSOP, and QSOP 16 Pin
Packages
Pb−Free Packages are Available*
V
CC
16
NO
2
15
NO
4
14
NO
0
13
NO
6
ADD
C
ADD
B
ADD
A
12
11
10
9
16
QSOP−16
QS SUFFIX
CASE 492
1
1
NLAST
4051
ALYW
A
= Assembly Location
WL, L
= Wafer Lot
Y
= Year
WW, W = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
1
NO
1
2
3
4
NO
7
5
NO
5
6
7
8
GND
NO
3
COM
Inhibit V
EE
Figure 1. Pin Connection
(Top View)
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
1
April, 2006 − Rev. 4
Publication Order Number:
NLAST4051/D

NLAST4051QSG Related Products

NLAST4051QSG NLAST4051QSRG NLAST4051DR2G NLAST4051DG
Description 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16, QSOP-16 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16, QSOP-16 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16, SOIC-16 IC 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16, SO-16, Multiplexer or Switch
Is it Rohs certified? conform to conform to conform to conform to
Maker ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor
Parts packaging code SOIC SOIC SOIC SOIC
package instruction SSOP, SSOP, SOP, SOP,
Contacts 16 16 16 16
Reach Compliance Code compliant compliant compliant compliant
Analog Integrated Circuits - Other Types SINGLE-ENDED MULTIPLEXER SINGLE-ENDED MULTIPLEXER SINGLE-ENDED MULTIPLEXER SINGLE-ENDED MULTIPLEXER
JESD-30 code R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 R-PDSO-G16
length 4.9 mm 4.89 mm 9.9 mm 9.9 mm
Maximum negative supply voltage (Vsup) -5.5 V -5.5 V -5.5 V -5.5 V
Nominal Negative Supply Voltage (Vsup) -3 V -3 V -3 V -3 V
Number of channels 8 8 8 8
Number of functions 1 1 1 1
Number of terminals 16 16 16 16
Nominal off-state isolation 93 dB 93 dB 93 dB 93 dB
On-state resistance matching specifications 15 Ω 15 Ω 15 Ω 15 Ω
Maximum on-state resistance (Ron) 37 Ω 37 Ω 37 Ω 37 Ω
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SSOP SSOP SOP SOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.75 mm 1.73 mm 1.75 mm 1.75 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 2.5 V 2.5 V 2.5 V 2.5 V
Nominal supply voltage (Vsup) 3 V 3 V 3 V 3 V
surface mount YES YES YES YES
Maximum disconnect time 28 ns 28 ns 28 ns 28 ns
Maximum connection time 28 ns 28 ns 28 ns 28 ns
technology CMOS CMOS CMOS CMOS
Temperature level MILITARY MILITARY MILITARY MILITARY
Terminal form GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.635 mm 0.64 mm 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 3.9116 mm 3.9 mm 3.9 mm 3.9 mm
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