Philips Semiconductors
Product data
Quad voltage comparator
LM139/239/239A/339/339A/
LM2901/MC3302
DESCRIPTION
The LM139 series consists of four independent precision voltage
comparators, with an offset voltage specification as low as 2.0 mV
max for each comparator, which were designed specifically to
operate from a single power supply over a wide range of voltages.
Operation from split power supplies is also possible and the low
power supply current drain is independent of the magnitude of the
power supply voltage. These comparators also have a unique
characteristic in that the input common-mode voltage range includes
ground, even though they are operated from a single power supply
voltage.
The LM139 series was designed to directly interface with TTL and
CMOS. When operated from both plus and minus power supplies,
the LM139 series will directly interface with MOS logic where their
low power drain is a distinct advantage over standard comparators.
PIN CONFIGURATION
D, DH, and N Packages
OUTPUT 2
OUTPUT 1
V+
INPUT 1 –
INPUT 1 +
INPUT 1 –
INPUT 1 +
1
2
3
1
4
5
6
7
TOP VIEW
2
3
4
11
10
9
8
INPUT 4 +
INPUT 4 –
INPUT 3 +
INPUT 3 –
14
13
12
OUTPUT 3
OUTPUT 4
GND
FEATURES
•
Wide single supply voltage range 2.0 V
DC
to 32 V
DC
or dual
•
Very low supply current drain (0.8 mA) independent of supply
•
Low input biasing current 25 nA
•
Low input offset current
±5
nA and offset voltage
•
Input common-mode voltage range includes ground
•
Differential input voltage range equal to the power supply voltage
•
Low output 250 mV at 4 mA saturation voltage
•
Output voltage compatible with TTL, DTL, ECL, MOS and CMOS
logic systems
voltage (1.0 mW/comparator at 5.0 V
DC
)
supplies
±1.0
V
DC
to
±16
V
DC
SL00070
Figure 1. Pin Configuration
EQUIVALENT CIRCUIT
V
+
3.5
µA
100
µA
3.5
µA
100
µA
Q2
Q3
Q4
OUTPUT
+
INPUT
– INPUT
Q1
APPLICATIONS
Q8
Q7
Q5
Q6
•
A/D converters
•
Wide range VCO
•
MOS clock generator
•
High voltage logic gate
•
Multivibrators
ORDERING INFORMATION
DESCRIPTION
14-Pin Plastic Dual In-Line Package (DIP)
14-Pin Plastic Small Outline (SO) Package
14-Pin Plastic Dual In-Line Package (DIP)
14-Pin Plastic Dual In-Line Package (DIP)
14-Pin Plastic Small Outline (SO) Package
14-Pin Plastic Dual In-Line Package (DIP)
14-Pin Plastic Thin Shrink Small Outline Package (TSSOP)
14-Pin Plastic Small Outline (SO) Package
14-Pin Plastic Dual In-Line Package (DIP)
14-Pin Plastic Small Outline (SO) Package
14-Pin Plastic Thin Shrink Small Outline Package (TSSOP)
14-Pin Plastic Dual In-Line Package (DIP)
14-Pin Plastic Small Outline (SO) Package
14-Pin Plastic Dual In-Line Package (DIP)
2002 Sep 17
2
(1 Comparator Only)
SL00071
Figure 2. Equivalent Circuit
TEMPERATURE RANGE
–55
°C
to +125
°C
–25
°C
to +85
°C
–25
°C
to +85
°C
–25
°C
to +85
°C
–40
°C
to +125
°C
–40
°C
to +125
°C
–40
°C
to +125
°C
0
°C
to +70
°C
0
°C
to +70
°C
0
°C
to +70
°C
0
°C
to +70
°C
0
°C
to +70
°C
–40
°C
to +85
°C
–40
°C
to +85
°C
ORDER CODE
LM139N
LM239D
LM239N
LM239AN
LM2901D
LM2901N
LM2901DH
LM339AD
LM339AN
LM339D
LM339DH
LM339N
MC3302D
MC3302N
DWG #
SOT27-1
SOT108-1
SOT27-1
SOT27-1
SOT108-1
SOT27-1
SOT402-1
SOT108-1
SOT27-1
SOT108-1
SOT402-1
SOT27-1
SOT108-1
SOT27-1
853-0930 28955
Philips Semiconductors
Product data
Quad voltage comparator
LM139/239/239A/339/339A/
LM2901/MC3302
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CC
V
DIFF
V
IN
P
D
V
CC
supply voltage
Differential input voltage
Input voltage
Maximum power dissipation, T
amb
= 25
°C
(still–air)
1
N package
D package
DH package
Output short-circuit to ground
2
I
IN
T
amb
Input current (V
IN
< –0.3 V
DC
Operating temperature range
LM139
LM239/239A
LM339/339A
LM2901
MC3302
Storage temperature range
Lead soldering temperature (10 sec max)
)
3
PARAMETER
RATING
32 or
±16
32
–0.3 to +32
1420
1040
762
Continuous
50
–55 to +125
–25 to +85
0 to +70
–40 to +125
–40 to +85
–65 to +150
230
mA
°C
°C
°C
°C
°C
°C
°C
UNIT
V
DC
V
DC
V
DC
mW
mW
mW
T
stg
T
sld
NOTES:
1.
Derate above 25
°C,
at the following rates:
N Package at 11.4 mW/°C
D Package at 8.3 mW/°C
DH Package at 6.1 mW/°C
2. Short circuits from the output to V+ can cause excessive heating and eventual destruction. The maximum output current is approximately
20 mA independent of the magnitude of V+.
3. This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector–base junction of
the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also
lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+
voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal
output states will reestablish when the input voltage, which was negative, again returns to a value greater than –0.3 V
DC
.
2002 Sep 17
3
Philips Semiconductors
Product data
Quad voltage comparator
LM139/239/239A/339/339A/
LM2901/MC3302
DC AND AC ELECTRICAL CHARACTERISTICS
V+ = 5 V
DC
; LM139: –55
°C ≤
T
amb
≤
+125
°C;
LM239/239A: –25
°C ≤
T
amb
≤
+85
°C;
LM339/339A: 0
°C ≤
T
amb
≤
+70
°C;
LM2901: –40
°C ≤
T
amb
≤
+125
°C;
MC3302: –40
°C ≤
T
amb
≤
+85
°C,
unless otherwise specified.
SYMBOL
V
OS
V
C
CM
V
IDR
I
BIAS
PARAMETER
Input offset voltage
2
Input common-mode voltage
g
3
range
Differential input voltage
1
Input bias current
4
TEST CONDITIONS
T
amb
= 25
°C
Over temp.
T
amb
= 25
°C
Over temp.
Keep all V
IN
≥
0 V
DC
(or V– if needed)
I
IN(+)
or I
IN(–)
with output in linear range
T
amb
= 25
°C
Over temp.
I
IN(+)
– I
IN(–)
T
amb
= 25
°C
Over temp.
V
IN(–)
≥
1 V
DC
; V
IN
(+) = 0; V
O
≤
1.5 V
DC
;
T
amb
= 25
°C
V
IN(+)
≥
1 V
DC
; V
IN
(–) = 0
V
O
= 5 V
DC
; T
amb
= 25
°C
V
O
= 30 V
DC
; over temp.
R
L
=
∞
on comparators; V+ = 30 V;
T
amb
= 25
°C
R
L
≥
15 kΩ; V+ = 15 V
DC
V
IN(–)
≥
1 V
DC
; V
IN(+)
= 0; I
SINK
≤
4 mA
T
amb
= 25
°C
Over temp.
V
IN
= TTL logic swing; V
REF
= 1.4 V
DC
; V
RL
= 5 V
DC
;
R
L
= 5.1 kΩ; T
amb
= 25
°C
V
RL
= 5 V
DC
; R
L
= 5.1 kΩ; T
amb
= 25
°C
50
6.0
25
0
0
LM239A/339A
Min
Typ
±1.0
Max
±2.0
±4.0
V+ –1.5
V+ –2.0
V+
250
400
±50
±150
UNIT
mV
mV
V
V
V
nA
nA
nA
nA
mA
I
OS
Input offset current
±5.0
I
OL
Output sink current
16
Output leakage current
0.1
1.0
0.8
200
250
400
700
2.0
nA
µA
mA
V/mV
mV
mV
ns
µs
I
CC
A
V
V
OL
Supply current
Voltage gain
Saturation voltage
t
LSR
t
R
Large-signal response time
Response time
5
300
1.3
See notes at the end of the Electrical Characteristics.
2002 Sep 17
4
Philips Semiconductors
Product data
Quad voltage comparator
LM139/239/239A/339/339A/
LM2901/MC3302
DC AND AC ELECTRICAL CHARACTERISTICS
(continued)
V+ = 5 V
DC
; LM139: –55
°C ≤
T
amb
≤
+125
°C;
LM239/239A: –25
°C ≤
T
amb
≤
+85
°C;
LM339/339A: 0
°C ≤
T
amb
≤
+70
°C;
LM2901: –40
°C ≤
T
amb
≤
+125
°C;
MC3302: –40
°C ≤
T
amb
≤
+85
°C,
unless otherwise specified.
SYMBOL
V
OS
V
C
CM
V
IDR
I
BIAS
PARAMETER
Input offset voltage
2
Input common-mode
voltage range
3
Differential input voltage
1
Input bias current
4
TEST CONDITIONS
T
amb
= 25
°C
Over temp.
T
amb
= 25
°C
Over temp.
Keep all V
IN
≥
0 V
DC
(or V– if needed)
I
IN(+)
or I
IN(–)
with output in linear range
T
amb
= 25
°C
Over temp.
I
IN(+)
– I
IN(–)
T
amb
= 25
°C
Over temp.
V
IN(–)
≥
1 V
DC
; V
IN(+)
= 0;
V
O
≤
1.5 V
DC
;
T
amb
= 25
°C
V
IN(+)
≥
1 V
DC
; V
IN(–)
= 0
V
O
= 5 V
DC
; T
amb
= 25
°C
V
O
= 30 V
DC
; Over temp.
R
L
=
∞
on comparators; V+ = 30 V;
T
amb
= 25
°C
R
L
≥
15 kΩ; V+ = 15 V
DC
V
IN(–)
≥
1 V
DC
; V
IN(+)
= 0; I
SINK
≤
4 mA
T
amb
= 25
°C
Over temp.
V
IN
= TTL logic swing; V
REF
= 1.4 V
DC
;
V
RL
= 5 V
DC
; R
L
= 5.1 kΩ;
T
amb
= 25
°C
V
RL
= 5 V
DC
; R
L
= 5.1 kΩ;
T
amb
= 25
°C
50
6.0
25
0
0
LM139
Min
Typ
±2.0
Max
±5.0
±9.0
V+–1.5
V+–2.0
V+
100
300
±25
±100
6.0
25
0
0
Min
LM239/339
Typ
±2.0
Max
±5.0
±9.0
V+–1.5
V+–2.0
V+
250
400
±50
±150
UNIT
mV
mV
V
V
V
nA
nA
nA
nA
mA
I
OS
Input offset current
±3.0
±5.0
I
OL
Output sink current
16
16
Output leakage current
0.1
1.0
0.8
200
250
400
700
2.0
50
0.1
1.0
0.8
200
250
400
700
2.0
nA
µA
mA
V/mV
mV
mV
ns
µs
I
CC
A
V
V
OL
Supply current
Voltage gain
Saturation voltage
t
LSR
Large-signal response time
300
300
t
R
Response time
5
1.3
1.3
See notes on following page.
2002 Sep 17
5
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