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HYB39S256400T-7.5

Description
Synchronous DRAM, 64MX4, 5.4ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-54
Categorystorage    storage   
File Size317KB,47 Pages
ManufacturerInfineon
Websitehttp://www.infineon.com/
Download Datasheet Parametric View All

HYB39S256400T-7.5 Overview

Synchronous DRAM, 64MX4, 5.4ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-54

HYB39S256400T-7.5 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerInfineon
Parts packaging codeTSOP2
package instructionTSOP2, TSOP54,.46,32
Contacts54
Reach Compliance Codecompliant
ECCN codeEAR99
access modeFOUR BANK PAGE BURST
Maximum access time5.4 ns
Other featuresAUTO/SELF REFRESH
Maximum clock frequency (fCLK)133 MHz
I/O typeCOMMON
interleaved burst length1,2,4,8
JESD-30 codeR-PDSO-G54
JESD-609 codee0
length22.22 mm
memory density268435456 bit
Memory IC TypeSYNCHRONOUS DRAM
memory width4
Number of functions1
Number of ports1
Number of terminals54
word count67108864 words
character code64000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize64MX4
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSOP54,.46,32
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Certification statusNot Qualified
refresh cycle8192
Maximum seat height1.2 mm
self refreshYES
Continuous burst length1,2,4,8
Maximum standby current0.002 A
Maximum slew rate0.27 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm
HYB 39S256400/800/160T
256-MBit Synchronous DRAM
256-MBit Synchronous DRAM
• High Performance:
• Multiple Burst Read with Single Write
Operation
-8A
125
8
6
12
6
-8B
100
10
6
15
7
Units
MHz
ns
ns
ns
ns
• Automatic and Controlled Precharge
Command
• Data Mask for Read/Write Control (x4, x8)
• Data Mask for Byte Control (x16)
• Auto Refresh (CBR) and Self Refresh
• Suspend Mode and Power Down Mode
• 8192 Refresh Cycles / 64 ms (7.8
µs)
• Random Column Address every CLK
(1-N Rule)
• Single 3.3 V
±
0.3 V Power Supply
• LVTTL Interface
• Plastic Packages:
P-TSOPII-54 400mil width (x4, x8, x16)
• -7.5
-8
-8A
-8B
parts
parts
parts
parts
for PC133 3-3-3 operation
for PC100 2-2-2 operation
for PC100 3-2-2 operation
for PC100 3-2-3 operation
-7.5
-8
125
8
6
10
6
f
CK
t
CK3
t
AC3
t
CK2
t
AC2
133
7.5
5.4
12
6
• Fully Synchronous to Positive Clock Edge
• 0 to 70
°C
operating temperature
• Four Banks controlled by BA0 & BA1
• Programmable CAS Latency: 2 & 3
• Programmable Wrap Sequence: Sequential
or Interleave
• Programmable Burst Length: 1, 2, 4, 8
The HYB 39S256400/800/160T are four bank Synchronous DRAM’s organized as
4 banks
×
16MBit x4, 4 banks
×
8MBit x8 and 4 banks
×
4Mbit x16 respectively. These synchro-
nous devices achieve high speed data transfer rates for CAS-latencies by employing a chip
architecture that prefetches multiple bits and then synchronizes the output data to a system clock.
The chip is fabricated using the Infineon advanced 256 MBit DRAM process technology.
The device is designed to comply with all industry standards set for synchronous DRAM products,
both electrically and mechanically. All of the control, address, data input and output circuits are
synchronized with the positive edge of an externally supplied clock.
Operating the four memory banks in an interleave fashion allows random access operation to occur
at higher rate than is possible with standard DRAMs. A sequential and gapless data rate of is
possible depending on burst length, CAS latency and speed grade of the device.
Auto Refresh (CBR) and Self Refresh operation are supported. These devices operates with a
single 3.3 V
±
0.3 V power supply and are available in TSOPII packages.
Data Book
1
12.99

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