SN74HC00N3 datasheet, PDF - EEWORLD Datasheet

SN74HC00N3: DescriptionQuad 2-Input Positive-NAND Gates 14-PDIP -40 to 85; Categorylogic logic; File Size685KB，18 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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SN74HC00N3 Overview

Quad 2-Input Positive-NAND Gates 14-PDIP -40 to 85

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Texas Instruments
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14
Reach Compliance Code	not_compliant
series	HC/UH
JESD-30 code	R-PDIP-T14
length	19.305 mm
Logic integrated circuit type	NAND GATE
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2/6 V
propagation delay (tpd)	115 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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