MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MMBV2101LT1/D
Silicon Tuning Diodes
These devices are designed in the popular PLASTIC PACKAGE for high volume
requirements of FM Radio and TV tuning and AFC, general frequency control and
tuning applications.They provide solid–state reliability in replacement of mechanical
tuning methods. Also available in Surface Mount Package up to 33pF.
•
High Q
•
Controlled and Uniform Tuning Ratio
•
Standard Capacitance Tolerance
10%
•
Complete Typical Design Curves
3
Cathode
SOT–23
2
Cathode
1
Anode
MMBV2101LT1
MMBV2103LT1
MMBV2105LT1
MMBV2107LT1
MMBV2108LT1
MMBV2109LT1
MV2101 MV2104
MV2105 MV2108
MV2109 MV2111
MV2115
6.8–100 pF
30 VOLTS
VOLTAGE VARIABLE
CAPACITANCE DIODES
3
TO–92
1
Anode
MAXIMUM RATINGS
Rating
Reverse Voltage
Forward Current
Forward Power Dissipation
@ TA = 25°C
Derate above 25°C
Junction Temperature
Storage Temperature Range
Symbol
VR
IF
PD
280
2.8
TJ
Tstg
+150
–55 to +150
225
1.8
mW
mW/°C
°C
°C
1
2
MV21xx
MMBV21xxLT1
30
200
Unit
Vdc
mAdc
1
2
CASE 318 – 08, STYLE 8
SOT– 23 (TO – 236AB)
DEVICE MARKING
MMBV2101LT1 = M4G
MMBV2103LT1 = 4H
MMBV2105LT1 = 4U
MMBV2107LT1 = 4W
MMBV2108LT1 = 4X
MMBV2109LT1 = 4J
CASE 182–02, STYLE 1
TO–92 (TO–226AC)
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Characteristic
Reverse Breakdown Voltage
(IR = 10
µAdc)
Reverse Voltage Leakage Current
(VR = 25 Vdc, TA = 25°C)
Diode Capacitance Temperature Coefficient
(VR = 4.0 Vdc, f = 1.0 MHz)
Symbol
V(BR)R
IR
TCC
Min
30
—
—
Typ
—
—
280
Max
—
0.1
—
Unit
Vdc
µAdc
ppm/°C
Thermal Clad is a trademark of the Bergquist Company
REV 1
Motorola Small–Signal Transistors, FETs and Diodes Device Data
©
Motorola, Inc. 1997
1
MMBV2101LT1 MMBV2103LT1 MMBV2105LT1 MMBV2107LT1 MMBV2108LT1 MMBV2109LT1
MV2101 MV2104 MV2105 MV2108 MV2109 MV2111 MV2115
CT, Diode Capacitance
VR = 4.0 Vdc, f = 1.0 MHz
pF
Device
MMBV2101LT1/MV2101
MMBV2103LT1
MV2104
MMBV2105LT1/MV2105
MMBV2107LT1
MMBV2108LT1/MV2108
MMBV2109LT1/MV2109
MV2111
MV2115
Min
6.1
9.0
10.8
13.5
19.8
24.3
29.7
42.3
90
Nom
6.8
10
12
15
22
27
33
47
100
Max
7.5
11
13.2
16.5
24.2
29.7
36.3
51.7
110
Q, Figure of Merit
VR = 4.0 Vdc,
f = 50 MHz
Typ
450
400
400
400
350
300
200
150
100
Min
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.6
TR, Tuning Ratio
C2/C30
f = 1.0 MHz
Typ
2.7
2.9
2.9
2.9
2.9
3.0
3.0
3.0
3.0
Max
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.3
MMBV2101LT1, MMBV2103LT1, MMBV2105LT1, MMBV2107LT1 thru MMBV2109LT1,
are also available in bulk. Use the device title and drop
the ”T1” suffix when ordering any of these devices in bulk.
PARAMETER TEST METHODS
1. CT, DIODE CAPACITANCE
(CT = CC + CJ). CT is measured at 1.0 MHz using a ca-
pacitance bridge (Boonton Electronics Model 75A or
equivalent).
2. TR, TUNING RATIO
TR is the ratio of CT measured at 2.0 Vdc divided by CT
measured at 30 Vdc.
3. Q, FIGURE OF MERIT
Q is calculated by taking the G and C readings of an ad-
mittance bridge at the specified frequency and substitut-
ing in the following equations:
Q
4. TCC, DIODE CAPACITANCE TEMPERATURE
COEFFICIENT
TCC is guaranteed by comparing CT at VR = 4.0 Vdc,
f = 1.0 MHz, TA = –65°C with CT at VR = 4.0 Vdc, f =
1.0 MHz, TA = +85°C in the following equation, which de-
fines TCC:
106
CT(25°C)
Accuracy limited by measurement of CT to
±
0.1 pF.
TCC
·
– C
+
CT(
)
85°C)
)
65T(–65°C)
85
+
2
p
fC
G
(Boonton Electronics Model 33AS8 or equivalent). Use
Lead Length
1/16”.
[
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMBV2101LT1 MMBV2103LT1 MMBV2105LT1 MMBV2107LT1 MMBV2108LT1 MMBV2109LT1
MV2101 MV2104 MV2105 MV2108 MV2109 MV2111 MV2115
TYPICAL DEVICE CHARACTERISTICS
TA = 25°C
f = 1.0 MHz
1000
500
C T , DIODE CAPACITANCE (pF)
MV2115
200
100
50
20
10
5.0
2.0
1.0
0.1
0.2
0.3
0.5
1.0
2.0
3.0
5.0
10
20
30
MMBV2109LT1/MV2109
MMBV2105LT1/MV2105
MMBV2101LT1/MV2101
VR, REVERSE VOLTAGE (VOLTS)
Figure 1. Diode Capacitance versus Reverse Voltage
1.040
NORMALIZED DIODE CAPACITANCE
1.030
1.020
1.010
1.000
0.990
0.980
0.970
0.960
–75
–50
NORMALIZED TO CT
at TA = 25°C
VR = (CURVE)
–25
0
+25
+50
+75
TJ, JUNCTION TEMPERATURE (°C)
+100
+125
VR = 4.0 Vdc
VR = 30 Vdc
VR = 2.0 Vdc
I R , REVERSE CURRENT (nA)
100
50
20
10
5.0
2.0
1.0
0.50
0.20
0.10
0.05
0.02
0.01
TA = 75°C
TA = 125°C
TA = 25°C
0
5.0
10
15
20
25
30
VR, REVERSE VOLTAGE (VOLTS)
Figure 2. Normalized Diode Capacitance versus
Junction Temperature
5000
3000
2000
MMBV2109LT1/MV2109
Q, FIGURE OF MERIT
Q, FIGURE OF MERIT
1000
500
300
200
100
50
30
20
10
1.0
2.0
10
3.0
5.0
7.0
VR, REVERSE VOLTAGE (VOLTS)
1000
500
300
200
100
MMBV2101LT1/MV2101
5000
3000
2000
Figure 3. Reverse Current versus Reverse Bias
Voltage
MMBV2101LT1/MV2101
MV2115
MV2115
50
30
20
TA = 25°C
VR = 4.0 Vdc
20
MMBV2109LT1/MV2109
TA = 25°C
f = 50 MHz
20
30
10
10
30
50
70
100
f, FREQUENCY (MHz)
200
250
Figure 4. Figure of Merit versus Reverse Voltage
Figure 5. Figure of Merit versus Frequency
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3
MMBV2101LT1 MMBV2103LT1 MMBV2105LT1 MMBV2107LT1 MMBV2108LT1 MMBV2109LT1
MV2101 MV2104 MV2105 MV2108 MV2109 MV2111 MV2115
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
0.037
0.95
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT–23
POWER DISSIPATION FOR A SURFACE MOUNT DEVICE
The power dissipation for a surface mount device is a function
of the pad size. These can vary from the minimum pad size for
soldering to the pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined by
TJ(max), the maximum rated junction temperature of the die,
R
θJA
, the thermal resistance from the device junction to ambient;
and the operating temperature, TA. Using the values provided on
the data sheet, PD can be calculated as follows.
PD =
TJ(max) – TA
R
θJA
The 556°C/W for the SOT–23 assumes the use of the
recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the surface mount packages. One is to increase the
area of the drain/collector pad. By increasing the area of the
drain/collector pad, the power dissipation can be increased.
Although the power dissipation can almost be doubled with
this method, area is taken up on the printed circuit board
which can defeat the purpose of using surface mount
technology.
Another alternative would be to use a ceramic substrate or
an aluminum core board such as Thermal Clad™. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
The values for the equation are found in the maximum ratings
table on the data sheet. Substituting these values into the
equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device. For example, for a
SOT–23 device, PD is calculated as follows.
PD =
150°C – 25°C
556°C/W
= 225 milliwatts
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
•
Always preheat the device.
•
The delta temperature between the preheat and
soldering should be 100°C or less.*
•
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference should be a maximum of 10°C.
•
The soldering temperature and time should not exceed
260°C for more than 10 seconds.
•
When shifting from preheating to soldering, the
maximum temperature gradient should be 5°C or less.
•
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
•
Mechanical stress or shock should not be applied during
cooling
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
4
Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMBV2101LT1 MMBV2103LT1 MMBV2105LT1 MMBV2107LT1 MMBV2108LT1 MMBV2109LT1
MV2101 MV2104 MV2105 MV2108 MV2109 MV2111 MV2115
SOLDER STENCIL GUIDELINES
Prior to placing surface mount components onto a printed
circuit board, solder paste must be applied to the pads. A
solder stencil is required to screen the optimum amount of
solder paste onto the footprint. The stencil is made of brass
or stainless steel with a typical thickness of 0.008 inches.
The stencil opening size for the surface mounted package
should be the same as the pad size on the printed circuit
board, i.e., a 1:1 registration.
TYPICAL SOLDER HEATING PROFILE
For any given circuit board, there will be a group of control
settings that will give the desired heat pattern. The operator
must set temperatures for several heating zones, and a
figure for belt speed. Taken together, these control settings
make up a heating “profile” for that particular circuit board.
On machines controlled by a computer, the computer
remembers these profiles from one operating session to the
next. Figure 6 shows a typical heating profile for use when
soldering a surface mount device to a printed circuit board.
This profile will vary among soldering systems but it is a good
starting point. Factors that can affect the profile include the
type of soldering system in use, density and types of
components on the board, type of solder used, and the type
of board or substrate material being used. This profile shows
temperature versus time. The line on the graph shows the
actual temperature that might be experienced on the surface
of a test board at or near a central solder joint. The two
profiles are based on a high density and a low density board.
The Vitronics SMD310 convection/infrared reflow soldering
system was used to generate this profile. The type of solder
used was 62/36/2 Tin Lead Silver with a melting point
between 177 –189°C. When this type of furnace is used for
solder reflow work, the circuit boards and solder joints tend to
heat first. The components on the board are then heated by
conduction. The circuit board, because it has a large surface
area, absorbs the thermal energy more efficiently, then
distributes this energy to the components. Because of this
effect, the main body of a component may be up to 30
degrees cooler than the adjacent solder joints.
STEP 1
PREHEAT
ZONE 1
“RAMP”
200°C
STEP 2
STEP 3
VENT
HEATING
“SOAK” ZONES 2 & 5
“RAMP”
STEP 5
STEP 4
HEATING
HEATING
ZONES 3 & 6 ZONES 4 & 7
“SPIKE”
“SOAK”
170°C
160°C
STEP 6 STEP 7
VENT COOLING
205° TO 219°C
PEAK AT
SOLDER JOINT
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
150°C
150°C
140°C
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
MASS OF ASSEMBLY)
100°C
100°C
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
50°C
TIME (3 TO 7 MINUTES TOTAL)
TMAX
Figure 6. Typical Solder Heating Profile
Motorola Small–Signal Transistors, FETs and Diodes Device Data
5
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