PD - 94456A
AFL50XXD SERIES
ADVANCED ANALOG
HIGH RELIABILITY
HYBRID DC/DC CONVERTERS
Description
The AFL Series of DC/DC converters feature high power
density with no derating over the full military tempera-
ture range. This series is offered as part of a complete
family of converters providing single and dual output
voltages and operating from nominal +28, +50, +120 or
+270 volt inputs with output power ranging from 80 to
120 watts. For applications requiring higher output
power, individual converters can be operated in paral-
lel. The internal current sharing circuits assure equal
current distribution among the paralleled converters. This
series incorporates Advanced Analog’s proprietary mag-
netic pulse feedback technology providing optimum
dynamic line and load regulation response. This feed-
back system samples the output voltage at the pulse
width modulator fixed clock frequency, nominally 550
KHz. Multiple converters can be synchronized to a sys-
tem clock in the 500 KHz to 700 KHz range or to the
synchronization output of one converter. Undervoltage
lockout, primary and secondary referenced inhibit, soft-
start and load fault protection are provided on all mod-
els.
These converters are hermetically packaged in two en-
closure variations, utilizing copper core pins to mini-
mize resistive DC losses. Three lead styles are avail-
able, each fabricated with Advanced Analog’s rugged
ceramic lead-to-package seal assuring long term
hermeticity in the most harsh environments.
Manufactured in a facility fully qualified to MIL-PRF-
38534, these converters are available in four screening
grades to satisfy a wide range of requirements. The CH
grade is fully compliant to the requirements of MIL-H-
38534 for class H. The HB grade is fully processed and
screened to the class H requirement, may not neces-
sarily meet all of the other MIL-PRF-38534 requirements,
e.g., element evaluation and Periodic Inspection (P.I.)
not required. Both grades are tested to meet the com-
plete group “A” test specification over the full military
50V Input, Dual Output
AFL
Features
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30 To 80 Volt Input Range
±
5,
±
12, and
±
15 Volts Outputs Available
High Power Density - up to 70 W / in3
Up To 100 Watt Output Power
Parallel Operation with Stress and Current
Sharing
Low Profile (0.380") Seam Welded Package
Ceramic Feedthru Copper Core Pins
High Efficiency - to 85%
Full Military Temperature Range
Continuous Short Circuit and Overload
Protection
Output Voltage Trim
Primary and Secondary Referenced
Inhibit Functions
Line Rejection > 40 dB - DC to 50KHz
External Synchronization Port
Fault Tolerant Design
Single Output Versions Available
Standard Military Drawings Available
temperature range without output power deration.
Two grades with more limited screening are also
available for use in less demanding applications.
Variations in electrical, mechanical and screen-
ing can be accommodated. Contact Advanced
Analog for special requirements.
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1
07/09/02
AFL50XXD Series
Specifications
ABSOLUTE MAXIMUM RATINGS
Input Voltage
Soldering Temperature
Case Temperature
-0.5V to 100V
300°C for 10 seconds
Operating
Storage
-55°C to +125°C
-65°C to +135°C
Static Characteristics
-55°C < T
CASE
< +125°C, 30V< V
IN
< 80V
unless otherwise specified.
Parameter
INPUT VOLTAGE
OUTPUT VOLTAGE
AFL5005D
AFL5012D
AFL5015D
AFL5005D
AFL5012D
AFL5015D
OUTPUT CURRENT
AFL5005D
AFL5012D
AFL5015D
OUTPUT POWER
AFL5005D
AFL5012D
AFL5015D
MAXIMUM CAPACITIVE LOAD
OUTPUT VOLTAGE
TEMPERATURE COEFFICIENT
OUTPUT VOLTAGE REGULATION
Line
Load
Cross
AFL5005D
AFL5012D
AFL5015D
1, 2, 3
1, 2, 3
1, 2, 3
Each Output Note 1
VIN = 50 Volts, 100% Load - Notes 1, 6
Note 10
No Load, 50% Load, 100% Load
VIN = 30, 50, 80 Volts.
VIN = 30, 50, 80 Volts. Note 12
Positive Output
Negative Output
Positive Output
Negative Output
Positive Output
Negative Output
-1.0
-8.0
-1.0
-5.0
-1.0
-5.0
+1.0
+8.0
+1.0
+5.0
+1.0
+5.0
%
%
%
%
%
%
10,000
-0.015
-0.5
-1.0
+0.015
+0.5
+1.0
1
1
1
1
1
1
2, 3
2, 3
2, 3
2, 3
2, 3
2, 3
Group A
Subgroups
Note 6
VIN = 50 Volts, 100% Load
Positive Output
Negative Output
Positive Output
Negative Output
Positive Output
Negative Output
Positive Output
Negative Output
Positive Output
Negative Output
Positive Output
Negative Output
VIN = 30, 50, 80 Volts - Notes 6, 11
Either Output
Either Output
Either Output
Total of Both Outputs. Notes 6,11
12.8
6.4
5.3
80
96
100
A
A
A
W
W
W
µfd
%/°C
%
%
4.95
-5.05
11.88
-12.12
14.85
-15.15
4.90
-5.10
11.76
-12.24
14.70
-15.30
5.00
-5.00
12.00
-12.00
15.00
-15.00
5.05
-4.95
12.12
-11.88
15.15
-14.85
5.10
-4.90
12.24
-11.76
15.30
-14.70
V
V
V
V
V
V
V
V
V
V
V
V
Test Conditions
Min
30
Nom
50
Max
80
Unit
V
1, 2, 3
1, 2, 3
For Notes to Specifications, refer to page 4
2
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AFL50XXD Series
Static Characteristics
(Continued)
Group A
Subgroups
Parameter
OUTPUT RIPPLE VOLTAGE
AFL5005D
AFL5012D
AFL5015D
Test Conditions
VIN = 30, 50, 80 Volts, 100% Load,
BW = 10MHz
Min
Nom
Max
Unit
1, 2, 3
1, 2, 3
1, 2, 3
60
80
80
mVpp
mVpp
mVpp
INPUT CURRENT
No Load
Inhibit 1
Inhibit 2
INPUT RIPPLE CURRENT
AFL5005D
AFL5012D
AFL5015D
CURRENT LIMIT POINT
Expressed as a Percentage
of Full Rated Load
1
2
3
1, 2, 3
1, 2, 3
1, 2, 3
1
2, 3
1, 2, 3
1, 2, 3
VIN = 50 Volts
IOUT = 0
Pin 4 Shorted to Pin 2
Pin 12 Shorted to Pin 8
VIN = 50 Volts, 100% Load
50
60
5
5
mA
mA
mA
mA
60
60
60
VOUT = 90% VNOM , Current split
equally on positive and negative outputs.
Note 5
mApp
mApp
mApp
115
105
125
125
115
140
%
%
%
LOAD FAULTPOWER DISSIPATION
Overload or Short Circuit
EFFICIENCY
AFL5005D
AFL5012D
AFL5015D
ENABLE INPUTS
(Inhibit Function)
Converter Off
Sink Current
Converter On
Sink Current
SWITCHING FREQUENCY
SYNCHRONIZATION INPUT
Frequency Range
Pulse Amplitude, Hi
Pulse Amplitude, Lo
Pulse Rise Time
Pulse Duty Cycle
ISOLATION
DEVICE WEIGHT
MTBF
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
V
IN
= 50 Volts
32
V
IN
= 50 Volts, 100% Load
78
80
81
Logical Low on Pin 4 or Pin 12
Note 1
Logical High on Pin 4 and Pin 12 - Note 9
Note 1
-0.5
2.0
81
84
85
0.8
100
50
100
550
600
700
10
0.8
100
80
%
%
%
V
µA
V
µA
KHz
KHz
V
V
nSec
%
MΩ
85
300
gms
KHrs
W
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
Note 1
Note 1
1
Input to Output or Any Pin to Case
(except Pin 3). Test @ 500VDC
Slight Variations with Case Style
MIL-HDBK-217F, AIF @ TC = 40°C
500
500
2.0
-0.5
20
100
For Notes to Specifications, refer to page 4
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3
AFL50XXD Series
Dynamic Characteristics
-55°C < T
CASE
< +125°C, V
IN
=50V
unless otherwise specified.
Group A
Subgroups
Note 2, 8
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
Load Step 50%
⇔
100%
Load Step 10%
⇔
50%
10%
⇒
50%
50%
⇒
10%
Load Step 50%
⇔
100%
Load Step 10%
⇔
50%
10%
⇒
50%
50%
⇒
10%
Load Step 50%
⇔
100%
Load Step 10%
⇔
50%
10%
⇒
50%
50%
⇒
10%
-450
-450
450
200
450
200
400
750
200
750
200
400
750
200
750
200
400
mV
µSec
mV
µSec
µSec
mV
µSec
mV
µSec
µSec
mV
µSec
mV
µSec
µSec
Parameter
LOAD TRANSIENT RESPONSE
AFL5005D
Either Output
Amplitude
Recovery
Amplitude
Recovery
Test Conditions
Min
Nom
Max
Unit
AFL5012D
Either Output
Amplitude
Recovery
Amplitude
Recovery
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
-750
-750
AFL5015D
Either Output
Amplitude
Recovery
Amplitude
Recovery
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
-750
-750
LINE TRANSIENT RESPONSE
Amplitude
Recovery
TURN-ON CHARACTERISTICS
Overshoot
Delay
LOAD FAULT RECOVERY
LINE REJECTION
4, 5, 6
4, 5, 6
Note 1, 2, 3
VIN Step = 30
⇔
80 Volts
Note 4
Enable 1, 2 on. (Pins 4, 12 high or
open)
Same as Turn On Characteristics.
MIL-STD-461D, CS101, 30Hz to 50KHz
Note 1
40
50
dB
50
75
250
120
mV
mSec
-500
500
500
mV
µSec
Notes to Specifications:
Parameters not 100% tested but are guaranteed to the limits specified in the table.
Recovery time is measured from the initiation of the transient to where Vout has returned to within
±1%
of Vout at
50% load.
3. Line transient transition time
≥
100
µSec.
4. Turn-on delay is measured with an input voltage rise time of between 100 and 500 volts per millisecond.
5. Current limit point is that condition of excess load causing output voltage to drop to 90% of nominal.
6. Parameter verified as part of another test.
7. All electrical tests are performed with the remote sense leads connected to the output leads at the load.
8. Load transient transition time
≥
10
µSec.
9. Enable inputs internally pulled high. Nominal open circuit voltage
≈
4.0V
DC
.
10. Load current split equally between +Vout and -Vout.
11. Output load must be distributed so that a minimum of 20% of the total output power is being provided by one of
the outputs.
12. Cross regulation measured with load on tested output at 20% while changing the load on other output from 20%
to 80%.
1.
2.
4
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AFL50XXD Series
AFL50XXD Circuit Description
Figure I. AFL Dual Output Block Diagram
DC INPUT
1
INPUT
FILTER
OUTPUT
FILTER
7
+ OUTPUT
ENABLE 1
4
PRIMARY
BIAS SUPPLY
CURRENT
SENSE
8
OUTPUT RETURN
OUTPUT
FILTER
SYNC OUTPUT
5
SHARE
CONTROL
SYNC INPUT
6
FB
9
- OUTPUT
ERROR
AMP
& REF
AMPLIFIER
11
12
10
SHARE
ENABLE 2
TRIM
CASE
3
INPUT RETURN
2
Circuit Operation and Application Information
The AFL series of converters employ a forward switched
mode converter topology. (refer to Figure I.) Operation of
the device is initiated when a DC voltage whose magnitude
is within the specified input limits is applied between pins 1
and 2. If pins 4 and 12 are enabled (at a logical 1 or open)
the primary bias supply will begin generating a regulated
housekeeping voltage bringing the circuitry on the primary
side of the converter to life. Two power MOSFETs used to
chop the DC input voltage into a high frequency square
wave, apply this chopped voltage to the power transformer.
As this switching is initiated, a voltage is impressed on a
second winding of the power transformer which is then
rectified and applied to the primary bias supply. When this
occurs, the input voltage is excluded from the bias voltage
generator and the primary bias voltage becomes internally
generated.
The switched voltage impressed on the secondary output
transformer windings is rectified and filtered to provide the
positive and negative converter output voltages. An error
amplifier on the secondary side compares the positive out-
put voltage to a precision reference and generates an error
signal proportional to the difference. This error signal is
magnetically coupled through the feedback transformer into
the control section of the converter varying the pulse width
of the square wave signal driving the MOSFETs, narrowing
the pulse width if the output voltage is too high and widen-
ing it if it is too low. These pulse width variations provide
the necessary corrections to maintain the magnitude of
output voltage within its’ specified limits.
Because the primary and secondary sides are coupled by
magnetic elements, full isolation from input to output is
achieved.
Although incorporating several sophisticated and useful
ancillary features, basic operation of the AFL50XXD series
can be initiated by simply applying an input voltage to pins 1
and 2 and connecting the appropriate loads between pins
7, 8, and 9. Of course, operation of anyconverter with high
power density should not be attempted before secure at-
tachment to an appropriate heat dissipator. (See
Thermal
Considerations,
page 7)
Inhibiting Converter Output
As an alternative to application and removal of the DC volt-
age to the input, the user can control the converter output
by providing TTL compatible, positive logic signals to either
of two enable pins (pin 4 or 12). The distinction between
these two signal ports is that enable 1 (pin 4) is referenced
to the input return (pin 2) while enable 2 (pin 12) is refer-
enced to the output return (pin 8). Thus, the user has
access to an inhibit function on either side of the isolation
barrier. Each port is internally pulled “high” so that when not
used, an open connection on both enable pins permits nor-
mal converter operation. When their use is desired, a logi-
cal “low” on either port will shut the converter down.
Figure II. Enable Input Equivalent Circuit
+ 5 .6 V
100K
P in 4 o r
P in 1 2
1N4148
290K
2N3904
180K
P in 2 o r
P in 8
D isa b le
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