TIBPAL20R6-20MFK datasheet, PDF

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TIBPAL20R6-20MFK: DescriptionOT PLD, 25ns, TTL, CQCC28, CERAMIC, CC-28; CategoryProgrammable logic devices Programmable logic; File Size327KB，26 Pages; ManufacturerRochester Electronics; Websitehttps://www.rocelec.com/

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TIBPAL20R6-20MFK Overview

OT PLD, 25ns, TTL, CQCC28, CERAMIC, CC-28

TIBPAL20R6-20MFK Parametric

Parameter Name	Attribute value
Maker	Rochester Electronics
package instruction	QCCN,
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Other features	REGISTER PRELOAD; POWER-UP RESET
maximum clock frequency	28.5 MHz
JESD-30 code	S-CQCC-N28
JESD-609 code	e0
length	11.43 mm
Dedicated input times	12
Number of I/O lines	2
Number of terminals	28
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	12 DEDICATED INPUTS, 2 I/O
Output function	MIXED
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QCCN
Package shape	SQUARE
Package form	CHIP CARRIER
Programmable logic type	OT PLD
propagation delay	25 ns
Maximum seat height	2.03 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	TTL
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	QUAD
width	11.43 mm

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TIBPAL20L8-15C, TIBPAL20R4-15C, TIBPAL20R6-15C, TIBPAL20R8-15C

TIBPAL20L8-20M, TIBPAL20R4-20M, TIBPAL20R6-20M, TIBPAL20R8-20M

HIGH-PERFORMANCE

IMPACT

™

PAL

CIRCUITS

•

High-Performance: f

max

(w/o feedback)

TIBPAL20R’ -15C Series . . . 45 MHz

TIBPAL20R’ -20M Series . . . 41.6 MHz

High-Performance . . . 45 MHz Min

Reduced I

of 180 mA Max

Functionally Equivalent, but Faster Than

PAL20L8, PAL20R4, PAL20R6, PAL20R8

Power-Up Clear on Registered Devices (All

Levels at the Output Pins Go High)

Preload Capability on Output Registers

Simplifies Testing

Package Options Include Both Plastic and

Ceramic Chip Carriers in Addition to Plastic

and Ceramic DIPs

DEVICE

PAL20L8

PAL20R4

PAL20R6

PAL20R8

INPUTS

3-STATE

O OUTPUTS

REGISTERED

Q OUTPUTS

4 (3-state buffers)

6 (3-state buffers)

8 (3-state buffers)

I/O

PORT

SRPS021 – D2920, JUNE 1986 – REVISED AUGUST 1989

TIBPAL20L8’

C SUFFIX . . . JT OR NT PACKAGE

M SUFFIX . . . JT OR W PACKAGE

(TOP VIEW)

GND

I/O

TIBPAL20L8’

C SUFFIX . . . FN PACKAGE

M SUFFIX . . . FK PACKAGE

(TOP VIEW)

description

These programmable array logic devices feature

high speed and functional equivalency when

compared with currently available devices. These

IMPACT™ circuits combine the latest Advanced

Low-Power Schottky technology with proven

titanium-tungsten fuses to provide reliable,

high-performance substitutes for conventional

TTL logic. Their easy programmability allows for

quick design of custom functions and typically

results in a more compact circuit board. In

addition, chip carriers are available for futher

reduction in board space.

3 2 1 28 27 26

12 13 14 15 16 17 18

I/O

–

No internal connection

Pin assignments in operating mode

Extra circuitry has been provided to allow loading of each register asynchronously to either a high or low state.

This feature simplifies testing because the registers can be set to an initial state prior to executing the test

sequence.

The TIBPAL20’ C series is characterized from 0°C to 75°C. The TIBPAL20’ M series is characterized for

operation over the full military temperature range of –55°C to 125°C.

These devices are covered by U.S. Patent 4,410,987.

IMPACT is a trademark of Texas Instruments Incorporated.

PAL is a registered trademark of Advanced Micro Devices Inc.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily

include testing of all parameters.

POST OFFICE BOX 655303

•

DALLAS, TEXAS 75265

GND

1989, Texas Instruments Incorporated

TIBPAL20R6-20MFK Related Products

	TIBPAL20R6-20MFK	TIBPAL20L8-20MFK	TIBPAL20R8-15CJT	TIBPAL20R8-20MFK
Description	OT PLD, 25ns, TTL, CQCC28, CERAMIC, CC-28	OT PLD, 25ns, TTL, CQCC28, CERAMIC, CC-28	OT PLD, 15ns, TTL, CDIP24, CERAMIC, DIP-24	OT PLD, 20ns, TTL, CQCC28, CERAMIC, CC-28
package instruction	QCCN,	QCCN,	DIP,	QCCN,
Reach Compliance Code	unknown	unknown	unknown	unknown
JESD-30 code	S-CQCC-N28	S-CQCC-N28	R-GDIP-T24	S-CQCC-N28
JESD-609 code	e0	e0	e0	e0
Dedicated input times	12	14	12	12
Number of terminals	28	28	24	28
Maximum operating temperature	125 °C	125 °C	75 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-	-55 °C
organize	12 DEDICATED INPUTS, 2 I/O	14 DEDICATED INPUTS, 6 I/O	12 DEDICATED INPUTS, 0 I/O	12 DEDICATED INPUTS, 0 I/O
Output function	MIXED	COMBINATORIAL	REGISTERED	REGISTERED
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, GLASS-SEALED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QCCN	QCCN	DIP	QCCN
Package shape	SQUARE	SQUARE	RECTANGULAR	SQUARE
Package form	CHIP CARRIER	CHIP CARRIER	IN-LINE	CHIP CARRIER
Programmable logic type	OT PLD	OT PLD	OT PLD	OT PLD
propagation delay	25 ns	25 ns	15 ns	20 ns
Maximum supply voltage	5.5 V	5.5 V	5.25 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V	4.75 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V
surface mount	YES	YES	NO	YES
technology	TTL	TTL	TTL	TTL
Temperature level	MILITARY	MILITARY	COMMERCIAL EXTENDED	MILITARY
Terminal surface	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD
Terminal form	NO LEAD	NO LEAD	THROUGH-HOLE	NO LEAD
Terminal location	QUAD	QUAD	DUAL	QUAD
Maker	Rochester Electronics	-	Rochester Electronics	Rochester Electronics
ECCN code	3A001.A.2.C	3A001.A.2.C	-	3A001.A.2.C
Other features	REGISTER PRELOAD; POWER-UP RESET	-	REGISTER PRELOAD; POWER-UP RESET	REGISTER PRELOAD; POWER-UP RESET
maximum clock frequency	28.5 MHz	-	37 MHz	28.5 MHz
length	11.43 mm	11.43 mm	-	11.43 mm
Maximum seat height	2.03 mm	2.03 mm	-	2.03 mm
Terminal pitch	1.27 mm	1.27 mm	-	1.27 mm
width	11.43 mm	11.43 mm	-	11.43 mm

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