EEWORLDEEWORLDEEWORLD

Part Number

Search

HD74AC107FP

Description
AC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, FP-14DA
Categorylogic    logic   
File Size111KB,7 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Environmental Compliance
Download Datasheet Parametric View All

HD74AC107FP Overview

AC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, FP-14DA

HD74AC107FP Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?conform to
MakerRenesas Electronics Corporation
Parts packaging codeSOIC
package instructionSOP, SOP14,.3
Contacts14
Reach Compliance Codecompliant
Other featuresALSO OPERATES WITH 5V SUPPLY
seriesAC
JESD-30 codeR-PDSO-G14
JESD-609 codee0
length10.06 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeJ-K FLIP-FLOP
Maximum Frequency@Nom-Sup100000000 Hz
Humidity sensitivity level1
Number of digits2
Number of functions2
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP14,.3
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3/5 V
propagation delay (tpd)14.5 ns
Certification statusNot Qualified
Maximum seat height2.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typeNEGATIVE EDGE
width5.5 mm
minfmax125 MHz

HD74AC107FP Preview

HD74AC107/HD74ACT107
Dual JK Flip-Flop (with Separate Clear and Clock)
REJ03D0243–0200Z
(Previous ADE-205-363 (Z))
Rev.2.00
Jul.16.2004
Description
The HD74AC107/HD74ACT107 dual JK master/slave flip-flops have a separate clock for each flip-flop. Inputs to the
master section are controlled by the clock pulse. The clock pulse also regulates the state of the coupling transistors
which connect the master and slave sections. The sequence of operation is as follows: 1) isolate slave from master; 2)
enter information from J and K inputs to master; 3) disable J and K inputs; 4) transfer information from master to slave.
Features
Outputs Source/Sink 24 mA
HD74ACT107 has TTL-Compatible Inputs
Ordering Information: Ex. HD74AC107
Part Name
HD74AC107FPEL
HD74AC107RPEL
Package Type
SOP-14 pin (JEITA)
Package Code Package Abbreviation Taping Abbreviation (Quantity)
FP-14DAV
FP
RP
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
SOP-14 pin (JEDEC) FP-14DNV
Notes: 1. Please consult the sales office for the above package availability.
2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of
the package code.
Pin Arrangement
J
1
1
Q
1
2
Q
1
3
K
1
4
Q
2
5
Q
2
6
GND 7
(Top view)
14 V
CC
13
C
D1
12
CP
1
11 K
2
10
C
D2
9
CP
2
8 J
2
Rev.2.00, Jul.16.2004, page 1 of 6
HD74AC107/HD74ACT107
Logic Symbol
1
12
4
J
1
CP
1
K
1
Q
1
2
Q
1
3
8
9
11
J
2
CP
2
K
2
Q
2
5
Q
2
6
C
D1
13
C
D2
10
V
CC
= Pin14
GND = Pin7
Pin Names
J
1
, J
2
, K
1
, K
2
CP
1
,
CP
2
C
D1
,
C
D2
Q
1
, Q
2
,
Q
1
,
Q
2
Data Inputs
Clock Pulse Inputs (Active Falling Edge)
Direct Clear Inputs (Active Low)
Outputs
Truth Table
Inputs
@ t
n
J
L
L
H
H
H
L
t
n
t
n + 1
L
H
L
H
:
:
:
:
High Voltage Level
Low Voltage Level
Bit time before clock pulse.
Bit time after clock pulse.
K
Qn
L
H
Qn
Outputs
@ t
n + 1
Q
Logic Diagram
C
D
J
K
CP
#CP
#CP
#CP
Q
Q
CP
#CP
CP
CP
CP
CP
CP
Rev.2.00, Jul.16.2004, page 2 of 6
HD74AC107/HD74ACT107
Absolute Maximum Ratings
Item
Supply voltage
DC input diode current
DC input voltage
DC output diode current
DC output voltage
DC output source or sink current
DC V
CC
or ground current per output pin
Storage temperature
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
, I
GND
Tstg
Ratings
–0.5 to 7
–20
20
–0.5 to Vcc+0.5
–50
50
–0.5 to Vcc+0.5
±50
±50
–65 to +150
Unit
V
mA
mA
V
mA
mA
V
mA
mA
°C
Condition
V
I
= –0.5V
V
I
= Vcc+0.5V
V
O
= –0.5V
V
O
= Vcc+0.5V
Recommended Operating Conditions: HD74AC107
Item
Supply voltage
Input and output voltage
Operating temperature
Input rise and fall time
(except Schmitt inputs)
V
IN
30% to 70% V
CC
Symbol
V
CC
V
I
, V
O
Ta
tr, tf
Ratings
2 to 6
0 to V
CC
–40 to +85
8
V
V
°C
ns/V
V
CC
= 3.0V
V
CC
= 4.5 V
V
CC
= 5.5 V
Unit
Condition
DC Characteristics: HD74AC107
Item
Sym-
bol
V
IH
Vcc
(V)
3.0
4.5
5.5
V
IL
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
V
OL
5.5
3.0
4.5
5.5
3.0
4.5
Input leakage
current
Dynamic output
current*
I
IN
I
OLD
I
OHD
5.5
5.5
5.5
5.5
min.
2.1
3.15
3.85
2.9
4.4
5.4
2.58
3.94
4.94
Ta = 25°C
°
typ.
1.5
2.25
2.75
1.50
2.25
2.75
2.99
4.49
5.49
0.002
0.001
0.001
max.
0.9
1.35
1.65
0.1
0.1
0.1
0.32
0.32
0.32
±0.1
Ta = –40 to
+85°C
°
min.
2.1
3.15
3.85
2.9
4.4
5.4
2.48
3.80
4.80
86
–75
max.
0.9
1.35
1.65
0.1
0.1
0.1
0.37
0.37
0.37
±1.0
40
µA
mA
mA
µA
V
V
OUT
= 0.1 V or V
CC
–0.1 V
Unit
Condition
Input Voltage
V
V
OUT
= 0.1 V or V
CC
–0.1 V
Output voltage
V
OH
V
IN
= V
IL
or V
IH
I
OUT
= –50
µA
V
IN
= V
IL
or V
IH
I
OH
= –12 mA
I
OH
= –24 mA
I
OH
= –24 mA
V
IN
= V
IL
or V
IH
I
OUT
= 50
µA
V
IN
= V
IL
or V
IH
I
OL
= 12 mA
I
OL
= 24 mA
I
OL
= 24 mA
V
IN
= V
CC
or GND
V
OLD
= 1.1 V
V
OHD
= 3.85 V
V
IN
= V
CC
or ground
Quiescent supply
5.5
4.0
I
CC
current
*Maximum
test duration 2.0 ms, one output loaded at a time.
Rev.2.00, Jul.16.2004, page 3 of 6
HD74AC107/HD74ACT107
Recommended Operating Conditions: HD74ACT107
Item
Supply voltage
Input and output voltage
Operating temperature
Input rise and fall time
(except Schmitt inputs)
V
IN
0.8 to 2.0 V
Symbol
V
CC
V
I
, V
O
Ta
tr, tf
Ratings
2 to 6
0 to V
CC
–40 to +85
8
V
V
°C
ns/V
V
CC
= 4.5V
V
CC
= 5.5V
Unit
Condition
DC Characteristics: HD74ACT107
Item
Sym-
bol
V
IH
V
IL
Output voltage
V
OH
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
V
OL
5.5
4.5
5.5
4.5
Input current
I
CC
/input current
Dynamic output
current*
Quiescent supply
current
I
IN
I
CCT
I
OLD
I
OHD
I
CC
5.5
5.5
5.5
5.5
5.5
5.5
min.
2.0
2.0
4.4
5.4
3.94
4.94
Ta = 25°C
°
typ.
1.5
1.5
1.5
1.5
4.49
5.49
0.001
0.001
0.6
max.
0.8
0.8
0.1
0.1
0.32
0.32
±0.1
4.0
Ta = –40 to
+85°C
°
min.
2.0
2.0
4.4
5.4
3.80
4.80
86
–75
max.
0.8
0.8
0.1
0.1
0.37
0.37
±1.0
1.5
40
µA
mA
mA
mA
µA
V
Unit
Condition
Input voltage
V
V
OUT
= 0.1 V or Vcc–0.1 V
V
OUT
= 0.1 V or Vcc–0.1 V
V
IN
= V
IL
or V
IH
I
OUT
= –50
µA
V
IN
= V
IL
V
IN
= V
IL
or V
IH
I
OUT
= 50
µA
V
IN
= V
IL
V
IN
= V
CC
or GND
V
IN
= V
CC
–2.1 V
V
OLD
= 1.1 V
V
OHD
= 3.85 V
V
IN
= V
CC
or ground
I
OL
= 24 mA
I
OL
= 24 mA
I
OH
= –24 mA
I
OH
= –24 mA
*Maximum
test duration 2.0 ms, one output loaded at a time.
AC Characteristics: HD74AC107
Ta = +25°C
C
L
= 50 pF
Item
Maximum clock
frequency
Propagation delay
C
P
to Q or
Q
Propagation delay
C
P
to Q or
Q
Propagation delay
C
D
to
Q
Propagation delay
Symbol
f
max
t
PLH
t
PHL
t
PLH
t
PHL
V
CC
(V)*
1
Min
3.3
125
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
150
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Typ
9.5
7.5
10.0
8.0
9.5
7.5
9.5
7.5
Max
13.0
10.0
13.5
10.5
13.0
10.0
13.0
10.0
Ta = –40°C to +85°C
C
L
= 50 pF
Min
100
125
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
14.0
11.0
14.5
11.5
14.0
11.0
14.0
11.0
Max
MHz
ns
ns
ns
ns
Unit
5.0
C
D
to
Q
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
Rev.2.00, Jul.16.2004, page 4 of 6
HD74AC107/HD74ACT107
Operating Requirements: HD74AC107
Ta = +25°C
C
L
= 50 pF
Item
Setup time
J or k to
C
P
Hold time
C
P
to J or k
Pulse width
C
P
or
C
D
Recovery time
C
D
to
C
P
Note:
Symbol V
CC
(V)*
1
Typ
t
su
3.3
3.0
t
h
t
w
t
rec
5.0
3.3
5.0
3.3
5.0
3.3
5.0
2.0
–1.5
–0.5
2.0
2.0
1.5
1.0
Ta = –40°C
to +85°C
C
L
= 50 pF
Unit
ns
Guaranteed Minimum
5.5
6.0
4.0
0.0
0.0
5.5
4.5
3.0
3.0
4.5
0.0
0.0
7.0
5.0
3.0
3.0
1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
AC Characteristics: HD74ACT107
Ta = +25°C
C
L
= 50 pF
Item
Maximum clock
frequency
Propagation delay
C
P
to Q or
Q
Propagation delay
C
P
to Q or
Q
Propagation delay
C
D
to
Q
Propagation delay
C
D
to Q
Note:
Symbol
f
max
t
PLH
t
PHL
t
PLH
t
PHL
V
CC
(V)*
1
Min
5.0
100
5.0
5.0
5.0
5.0
1.0
1.0
1.0
1.0
Typ
9.5
10.5
8.5
8.5
Max
12.5
13.0
11.0
11.0
Ta = –40°C to +85°C
C
L
= 50 pF
Min
80
1.0
1.0
1.0
1.0
13.5
14.0
12.0
12.0
Max
MHz
ns
Unit
1. Voltage Range 5.0 is 5.0 V ± 0.5 V
Operating Requirements: HD74ACT107
Ta = +25°C
C
L
= 50 pF
Item
Setup time
J or k to
C
P
Hold time
5.0
t
h
C
P
to J or k
Pulse width
t
w
5.0
C
P
or
C
D
Recovery time
t
rec
5.0
C
D
to
C
P
Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V
Symbol V
CC
(V)*
1
Typ
t
su
5.0
2.5
0.0
4.5
Ta = –40°C
to +85°C
C
L
= 50 pF
Unit
ns
Guaranteed Minimum
7.0
8.0
1.5
7.0
3.0
1.5
8.0
3.0
Capacitance
Item
Input capacitance
Power dissipation capacitance
Symbol
C
IN
C
PD
4.5
35.0
Typ
pF
pF
Unit
V
CC
= 5.5 V
V
CC
= 5.0 V
Condition
Rev.2.00, Jul.16.2004, page 5 of 6

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1748  2708  571  1591  1998  36  55  12  33  41 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号