WM8181
12-bit 2MSPS Serial Output CIS/CCD Digitiser
Advanced Information, January 2000, Rev 3.0
DESCRIPTION
The WM8181 is a 12-bit resolution, 2MSPS single channel
image digitiser which is designed for easy interface to either
CIS or CCD linear image sensors. Data is output in serial
mode. The applied clock frequency (MCLK) equals the bit
rate of the data output. The sample rate of the WM8181 can
be either 1/12th or 1/16th of the applied master clock
frequency.
The device can be configured for either single-ended or
differential input operation. In single ended input mode, a
reset clamp voltage can be applied to the analogue signal,
under the control of a digital signal at the CLAMP pin. The
WM8181 will accept either positive or negative-going video
signals at any voltage between AGND and AVDD. The ADC
references are internally generated. The range of these
references may be derived internally using a bandgap
generator or externally using the VREFIN pin.
The WM8181 is powered from either 3.3V or 5V single
supplies. The device may also be powered from split 5V
and 3.3V dual supplies. Typically, the WM8181 consumes
23mA supply current in normal operation. When the device
is powered down, the supply current falls to less than 1µA.
The WM8181 is available in a 16-pin wide-body SOIC
package.
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
12-bit 2MSPS ADC
No missing codes
Serial output
Simple clocking
Internal or external ADC reference range control
Accepts positive or negative video
Rail to rail input range
Reset-level clamp switch
3.3V or 5V single supplies
5V/3.3V dual supplies
23mA supply current
16-pin wide body SOIC package
APPLICATIONS
•
•
•
•
•
USB bus powered scanners
Flatbed scanners
Sheetfeed scanners
Contact image sensors (CIS)
Linear CCDs
BLOCK DIAGRAM
AVDD
(16)
VSMP
(12)
MCLK
(13)
PD
TIMING AND
POWER DOWN CONTROL
WM8181
(15) DVDD
VINP (4)
SAMPLE/
HOLD
VINM (5)
(10) DGND
CLAMP (11)
0.8*VDD
VREFIN (3)
+
-
x1
VRT/VRB
ADC
12
PARALLEL
TO
SERIAL
(14) DOUT
1.5V
BAND-
GAP
GENERATOR
(1)
(2)
AGND1 AGND2
(7)
VRT
(6)
VRB
WOLFSON MICROELECTRONICS LTD
Lutton Court, Bernard Terrace, Edinburgh, EH8 9NX, UK
Tel: +44 (0) 131 667 9386
Fax: +44 (0) 131 667 5176
Email: sales@wolfson.co.uk
http://www.wolfson.co.uk
Advanced Information
data sheets contain
preliminary data on new products in the
preproduction phase of development.
Supplementary data will be published at a
later date.
2000
Wolfson Microelectronics Ltd
.
WM8181
PIN CONFIGURATION
ORDERING INFORMATION
DEVICE
AGND1
1
16
AVDD
Advanced Information
TEMP. RANGE
0 to 70 C
o
PACKAGE
16-pin SOIC wide
body
XWM8181CDW
AGND2
VREFIN
2
15
DVDD
DOUT
3
14
VINP
4
13
MCLK
VINM
VRB
5
6
12
11
VSMP
CLAMP
VRT
7
10
DGND
NC
8
9
NC
PIN DESCRIPTION
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NAME
AGND1
AGND2
VREFIN
VINP
VINM
VRB
VRT
NC
NC
DGND
CLAMP
VSMP
MCLK
DOUT
DVDD
AVDD
Ground
Digital input
Digital input
Digital input
Digital output
Supply
Supply
TYPE
Ground
Ground
Analogue input
Analogue input
Analogue input
Analogue output
Analogue output
General analogue ground (0V).
Reference analogue ground (0V).
Allows external control of the ADC references.
Positive video input
Negative video input
Usually one of VINP or VINM will be an externally
applied d.c. bias, the other will be a signal voltage.
DESCRIPTION
Lower reference voltage. This pin must be connected to AGND and VRT via
decoupling capacitors. See Recommended External Components section for details.
Upper reference voltage. This pin must be connected to AGND and VRB via
decoupling capacitors. See Recommended External Components section for details.
No internal connection
No internal connection
Digital ground (0V).
Connects VINP and VINM together, active high.
Video sample synchronisation pulse, at input pixel rate. Sampled on rising edge of
MCLK. See Operational Timing Diagrams for details.
Master clock. This clock can be applied at either 12 or 16 times the input pixel rate.
ADC serial data output, changes on falling edge of MCLK.
Digital supply (3.3V, 5V).
Analogue supply (3.3V, 5V).
POSSIBLE POWER SUPPLY COMBINATIONS
COMBINATION
1
2
3
AVDD (VOLTS)
5
3.3
5
DVDD (VOLTS)
5
3.3
3.3
WOLFSON MICROELECTRONICS LTD
AI Rev 3.0 January 2000
2
Advanced Information
WM8181
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at
or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical
Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
CONDITION
Digital supply voltage: DVDD
Analogue supply voltage: AVDD
Digital ground: DGND. Analogue ground: AGND1, AGND2
Digital inputs: MCLK, VSMP, CLAMP
Digital outputs: DOUT
Analogue inputs: VINM, VINP, VREFIN
Reference pins: VRT, VRB
MIN
GND - 0.3V
GND - 0.3V
GND - 0.3V
GND - 0.3V
GND - 0.3V
GND - 0.3V
GND - 0.3V
o
MAX
GND + 7V
GND + 7V
GND + 0.3V
DVDD + 0.3V
DVDD + 0.3V
AVDD + 0.3V
AVDD + 0.3V
o
Operating temperature range: T
A
Storage temperature
Package body temperature (soldering 10 seconds)
Package body temperature (soldering 2 minutes)
Notes: 1. GND denotes the voltage of any ground pin.
0C
-65 C
o
+70 C
+150 C
+240 C
+183 C
o
o
o
2. AGND and DGND pins are intended to be operated at the same potential. Differential voltages between these pins will
degrade performance.
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Operating temperature range
Analogue supply voltage (5V)
Analogue supply voltage (3.3V)
Digital input and output
supply voltage
SYMBOL
T
A
AVDD
AVDD
DVDD
TEST CONDITIONS
MIN
0
4.5
2.97
2.97
5.0
3.3
3.3
TYP
MAX
70
5.5
3.63
AVDD
UNIT
°C
V
V
V
WOLFSON MICROELECTRONICS LTD
AI Rev 3.0 January 2000
3
WM8181
ELECTRICAL CHARACTERISTICS
Advanced Information
TEST CHARACTERISTICS
AVDD = DVDD = 2.97 to 3.63V and 4.5 to 5.5V, AGND1 = AGND2 = DGND = 0V, T
A
= 0 to 70°C, MCLK = 24MHz
unless otherwise stated.
PARAMETER
ANALOGUE SPECIFICATION
12-bit ADC including Sample and Hold. No Missing Codes Guaranteed.
Maximum sample rate
Input signal voltage for
ADC full-scale (internal
reference control)
Input signal voltage for
ADC full-scale (external
reference control)
Input signal voltage for
ADC zero-scale (internal
reference control)
Input signal voltage for
ADC zero-scale (external
reference control)
Differential non-linearity
Integral non-linearity
Analogue Inputs
Input voltage limits
References: VRT, VRB
VRT (internal reference control)
VRB (internal reference control)
VRT (external reference control)
AVDD = 5V
AVDD = 3.3V
AVDD = 5V
AVDD = 3.3V
AVDD = 5V
AVDD = 3.3V
VRB (external reference control)
AVDD = 5V
AVDD = 3.3V
VRT, VRB output leakage
Clamp
VINM to VINP leakage
VINM to VINP resistance
VINM to VINP resistance
CLAMP low
CLAMP high, AVDD = 3.3V
VINP = VINM = 2V
CLAMP high, AVDD = 5V
VINP = VINM = 1.4V
<1
50
30
µA
Ω
Ω
Power down
2.85
1.70
1.35
0.95
2.10 +
VREFIN/2
1.35 +
VREFIN/4
2.10 -
VREFIN/2
1.35 -
VREFIN/4
<1
µA
V
V
V
V
V
V
V
VINP, VINM
0
AVDD
V
VINP-VINM
MCLK:VSMP ratio = 12:1
2
1.5
MSPS
V
SYMBOL
TEST
CONDITIONS
MIN
TYP
MAX
UNIT
VINP-VINM
VREFIN
V
VINP-VINM
0
V
VINP-VINM
0
V
DNL
INL
0.5
1.5
LSB
LSB
WOLFSON MICROELECTRONICS LTD
AI Rev 3.0 January 2000
4
Advanced Information
TEST CHARACTERISTICS
AVDD = DVDD = 2.97 to 3.63V and 4.5 to 5.5V, AGND1 = AGND2 = DGND = 0V, T
A
= 0 to 70°C, MCLK = 24MHz
unless otherwise stated.
PARAMETER
DIGITAL SPECIFICATION
Digital Inputs
High level input voltage
Low level input voltage
High level input current
Low level input current
Input capacitance
Digital Outputs
High level output voltage
Low level output voltage
High impedance output current
OVERALL SYSTEM SPECIFICATION
Supply Currents
Total analogue supply current –
active
Total digital supply current –
active
Supply current – disabled
AVDD = DVDD = 5V
AVDD = DVDD = 3.3V
AVDD = DVDD = 5V
AVDD = DVDD = 3.3V
AVDD = DVDD = 5V
AVDD = DVDD = 3.3V
t
PER
MCLK
t
VSMPSU
VSMP
t
VSMPH
SAMPLE n
t
PD
DOUT
n-2 D[11]
n-2 D[10]
t
M C L K H
t
M C L K L
21
19
2
1
<1
<1
I
OH
= 1mA
I
OL
= -1mA
<1
DVDD - 0.5
0.5
V
IH
V
IL
<1
<1
5
0.8
∗
DVDD
SYMBOL
TEST
CONDITIONS
MIN
TYP
MAX
WM8181
UNIT
V
0.2
∗
DVDD
V
µA
µA
pF
V
V
µA
mA
mA
mA
mA
µA
µA
n-2 D[9]
Figure 1 Clock Inputs and Data Output
TEST CHARACTERISTICS
AVDD = DVDD = 2.97 to 3.63V and 4.5 to 5.5V, AGND1 = AGND2 = DGND = 0V, T
A
= 0 to 70°C, MCLK = 24MHz
unless otherwise stated.
PARAMETER
Maximum MCLK period
MCLK high
MCLK low
VSMP data set-up time
VSMP data hold time
MCLK to DOUT
propagation delay
MCLK to DOUT
propagation delay
SYMBOL
t
PER
t
MCLKH
t
MCLKL
t
VSMPSU
t
VSMPH
t
PD
t
PD
AVDD = DVDD = 5V
AVDD = DVDD = 3.3V
TEST CONDITIONS
MIN
41.7
16
16
10
10
10
15
TYP
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
Note: Parameters are measured at 50% of the rising/falling edge.
WOLFSON MICROELECTRONICS LTD
AI Rev 3.0 January 2000
5
京公网安备 11010802033920号
EEWORLD
