WMS512K8-XXX
HI-RELIABILITY PRODUCT
512Kx8 MONOLITHIC SRAM, SMD 5962-95613
FEATURES
s
Access Times 15, 17, 20, 25, 35, 45, 55ns
s
MIL-STD-883 Compliant Devices Available
s
Revolutionary, Center Power/Ground Pinout
JEDEC Approved
• 36 lead Ceramic SOJ (Package 100)
• 36 lead Ceramic Flat Pack (Package 226)
s
Evolutionary, Corner Power/Ground Pinout
JEDEC Approved
• 32 pin Ceramic DIP (Package 300)
• 32 lead Ceramic SOJ (Package 101)
• 32 lead Ceramic Flat Pack (Package 220)
• 32 lead Ceramic Flat Pack (Package 142)
s
32 pin, Rectangular Ceramic Leadless Chip Carrier
(Package 601)
s
Commercial, Industrial and Military Temperature Range
s
5 Volt Power Supply
s
Low Power CMOS
s
Low Power Data Retention for Battery Back-up Operation
s
TTL Compatible Inputs and Outputs
REVOLUTIONARY PINOUT
36 FLAT PACK
36 CSOJ
EVOLUTIONARY PINOUT
32 DIP
32 CSOJ (DE)
32 FLAT PACK (FE)*
32 FLAT PACK (FD)
32 CLCC
TOP VIEW
A0
A1
A2
A3
A4
CS
I/O0
I/O1
V
CC
GND
I/O2
I/O3
WE
A5
A6
A7
A8
A9
TOP VIEW
A12
NC
A18
A17
A16
A15
OE
I/O7
I/O6
GND
V
CC
I/O5
I/O4
A14
A13
A12
A11
A10
NC
TOP VIEW
A14
A16
A18
A15
V
CC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
4 3 2 1 32 31 30
A7
A6
A5
A4
A3
A2
A1
A0
I/O
0
5
29
6
28
7
27
8
26
9
25
10
24
11
23
12
22
13
21
14 15 16 17 18 19 20
I/O1
I/O2
V
SS
I/O3
I/O4
I/O5
I/O6
A17
V
CC
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
PIN DESCRIPTION
A
0-18
I/O
0-7
CS
OE
WE
V
CC
GND
Address Inputs
Data Input/Output
Chip Select
Output Enable
Write Enable
+5.0V Power
Ground
*Package not recommended for new designs, "FD" recommended for new designs.
October 2000 Rev. 4
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMS512K8-XXX
ABSOLUTE MAXIMUM RATINGS
Parameter
Operating Temperature
Storage Temperature
Signal Voltage Relative to GND
Junction Temperature
Supply Voltage
Symbol
T
A
T
STG
V
G
T
J
V
CC
-0.5
Min
-55
-65
-0.5
Max
+125
+150
Vcc+0.5
150
7.0
Unit
°C
°C
V
°C
V
CS
H
L
L
L
OE
X
L
X
H
WE
X
H
L
H
TRUTH TABLE
Mode
Standby
Read
Write
Out Disable
Data I/O
High Z
Data Out
Data In
High Z
Power
Standby
Active
Active
Active
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Operating Temp. (Mil.)
Symbol
V
CC
V
IH
V
IL
T
A
Min
4.5
2.2
-0.3
-55
Max
5.5
V
CC
+ 0.3
+0.8
+125
Unit
V
V
V
°C
CAPACITANCE
(T
A
= +25°C)
Parameter
Input capacitance
Symbol
C
IN
Condition
V
IN
= 0V, f = 1.0MHz
Package
32 Pin CSOJ, DIP,
Flat Pack Evolutionary
32 Pin CLCC
36 Pin CSOJ & Flat Pack
Revolutionary
32 Pin CSOJ, DIP,
Flat Pack Evolutionary
36 Pin CSOJ & Flat Pack
Revolutionary
Speed (ns)
15 to 55
15 to 55
15 to 35
45 to 55
15 to 55
15 to 35
45 to 55
Max
20
15
12
20
20
12
20
Unit
pF
pF
pF
pF
pF
pF
pF
Output capicitance
C
OUT
V
OUT
= 0V, f = 1.0MHz
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55°C to +125°C)
Parameter
Input Leakage Current
Output Leakage Current
Operating Supply Current*
Standby Current
Output Low Voltage
Output High Voltage
Sym
I
LI
I
LO
I
CC
I
SB
V
OL
V
OH
Conditions
Min
V
CC
= 5.5, V
IN
= GND to V
CC
CS = V
IH
, OE = V
IH
, V
OUT
= GND to V
CC
CS = V
IL
, OE = V
IH
, f = 5MHz, Vcc = 5.5
CS = V
IH
, OE = V
IH
, f = 5MHz, Vcc = 5.5
I
OL
= 8mA for 17 - 35ns,
I
OL
= 2.1mA for 45 - 55ns, V
CC
= 4.5
I
OH
= -4.0mA for 17 - 35ns,
I
OH
= -1.0mA for 45 - 55ns, V
CC
= 4.5
2.4
Max
10
10
160
15
0.4
Units
µA
µA
mA
mA
V
V
NOTE: DC test conditions: V
IH
= V
CC
-0.3V, V
IL
= 0.3V
* Not 100% duty cycle
DATA RETENTION CHARACTERISTICS FOR LOW POWER “L” VERSION
Parameter
Symbol
Conditions
Min
Data Retention Supply Voltage
Low Power Data Retention
Low Power Data Retention
V
DR
I
CCDR1
I
CCDR2
CS
≥
V
CC
-0.2V
V
CC
= 3V
V
CC
= 2V
2.0
Max
5.5
7
2
V
mA
mA
Units
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
2
WMS512K8-XXX
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55°C to +125°C)
Parameter
Read Cycle
Read Cycle Time
Address Access Time
Output Hold from Address Change
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
t
RC
t
AA
t
OH
t
ACS
t
OE
t
CLZ
1
t
OLZ
1
t
CHZ
1
t
OHZ
1
Symbol
Min
15
-15
Max
-17
Min
17
15
17
0
15
8
17
9
2
0
8
8
9
9
2
0
0
Max
-20
Min Max
20
20
0
20
10
2
0
10
10
-25
Min
25
25
0
25
12
4
0
12
12
Max
Min
35
-35
Max
Min
45
35
0
35
25
4
0
15
15
-45
Max
-55
Min
55
45
0
45
25
4
0
20
20
20
20
55
25
55
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
0
2
0
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55°C to +125°C)
Parameter
Write Cycle
Write Cycle Time
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
Output Active from End of Write
Write Enable to Output in High Z
Data Hold Time
t
WC
t
CW
t
AW
t
DW
t
WP
t
AS
t
AH
t
OW
1
t
WHZ
1
t
DH
0
Symbol
Min
15
13
13
8
13
2
0
2
8
0
-15
Max
Min
17
14
14
9
14
2
0
2
9
0
-17
Max
20
14
14
10
14
2
0
3
9
0
-20
Min
Max
Min
25
15
15
10
15
2
0
4
10
0
-25
Max
Min
35
25
25
20
25
2
0
4
15
0
-35
Max
45
35
35
25
35
2
5
5
20
0
-45
Min
Max
55
50
50
25
40
2
5
5
25
-55
Min
Max
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
1. This parameter is guaranteed by design but not tested.
AC TEST CIRCUIT
I
OL
Current Source
AC TEST CONDITIONS
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Typ
V
IL
= 0, V
IH
= 3.0
5
1.5
1.5
Unit
V
ns
V
V
D.U.T.
C
eff
= 50 pf
V
Z
≈
1.5V
Output Timing Reference Level
(Bipolar Supply)
I
OH
Current Source
NOTES:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z
0
= 75
Ω.
V
Z
is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMS512K8-XXX
TIMING WAVEFORM - READ CYCLE
t
RC
ADDRESS
t
AA
CS
t
RC
ADDRESS
t
ACS
t
CLZ
OE
t
CHZ
t
AA
t
OH
DATA I/O
PREVIOUS DATA VALID
DATA VALID
t
OE
t
OLZ
DATA I/O
HIGH IMPEDANCE
t
OHZ
DATA VALID
READ CYCLE 1 (CS = OE = V
IL
, WE = V
IH
)
READ CYCLE 2 (WE = V
IH
)
WRITE CYCLE - WE CONTROLLED
t
WC
ADDRESS
t
AW
t
CW
CS
t
AH
t
AS
WE
t
WP
t
OW
t
WHZ
t
DW
t
DH
DATA I/O
DATA VALID
WRITE CYCLE 1, WE CONTROLLED
WRITE CYCLE - CS CONTROLLED
t
WC
ADDRESS
WS32K32-XHX
t
AW
t
CW
CS
t
AH
t
AS
WE
t
WP
t
OW
t
WHZ(1)
t
DW
t
DH
DATA I/O
DATA VALID
WRITE CYCLE 1 WE CONTROLLED (OE = V
IH
)
(1) GUARANTEED BY DESIGN BUT NOT TESTED
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
4
WMS512K8-XXX
PACKAGE 100:
36 LEAD, CERAMIC SOJ
23.37 (0.920)
±
0.25 (0.010)
0.2 (0.008)
±
0.05 (0.002)
4.7 (0.184) MAX
0.89 (0.035)
Radius TYP
11.23 (0.442)
±
0.30 (0.012)
9.55 (0.376)
±
0.25 (0.010)
1.27 (0.050)
±
0.25 (0.010)
PIN 1 IDENTIFIER
1.27 (0.050) TYP
21.6 (0.850) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 101:
32 LEAD, CERAMIC SOJ
21.1 (0.830)
±
0.25 (0.010)
0.2 (0.008)
±
0.05 (0.002)
3.96 (0.156) MAX
0.89 (0.035)
Radius TYP
11.23 (0.442)
±
0.30 (0.012)
9.55 (0.376)
±
0.25 (0.010)
1.27 (0.050)
±
0.25 (0.010)
PIN 1 IDENTIFIER
1.27 (0.050) TYP
19.1 (0.750) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
Analog electronics
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