342MI-XXLF datasheet, PDF - EEWORLD Datasheet

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342MI-XXLF: DescriptionClock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8; CategoryThe embedded processor and controller Microcontrollers and processors; File Size96KB，9 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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342MI-XXLF Overview

Clock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8

342MI-XXLF Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	SOIC
package instruction	SOP,
Contacts	8
Reach Compliance Code	compliant
ECCN code	EAR99
JESD-30 code	R-PDSO-G8
JESD-609 code	e3
length	4.9 mm
Humidity sensitivity level	1
Number of terminals	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Maximum output clock frequency	200 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
Master clock/crystal nominal frequency	50 MHz
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage	3.45 V
Minimum supply voltage	3.15 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER

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DATASHEET

FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER

ICS342

Description

The ICS342 is a low cost, dual-output, field programmable

clock synthesizer. The ICS342 can generate two output

frequencies from 250 kHz to 200 MHz, using up to two

independently configurable PLLs. The outputs may employ

Spread Spectrum techniques to reduce system

electro-magnetic interference (EMI).

Using IDT’s VersaClock

software to configure the PLL

and output, the ICS342 contains a One-Time

Programmable (OTP) ROM to allow field programmability.

Programming features include 2 selectable configuration

registers. Using Phase-Locked Loop (PLL) techniques, the

device runs from a standard fundamental mode,

inexpensive crystal, or clock. It can replace multiple crystals

and oscillators, saving board space and cost.

The device also has a power down feature that tri-states the

clock outputs and turns off the PLLs when the PDTS pin is

taken low.

The ICS342 is also available in factory programmed custom

versions for high-volume applications.

Features

•

8-pin SOIC package (Pb-free)

•

Highly accurate frequency generation

•

M/N Multiplier PLL: M = 1...2048, N = 1...1024

•

Output clock frequencies up to 200 MHz

•

Two ROM locations for frequency and spread selection

•

Spread spectrum capability for lower system EMI

•

Center or Down Spread up to 4% total

•

Selectable 32 kHz or 120 kHz modulation

•

Input crystal frequency from 5 to 27 MHz

•

Input clock frequency from 2 to 50 MHz

•

Operating voltage of 3.3 V

•

Advanced, low power CMOS process

•

For one output clock, use the ICS341. For three output

clocks, see the ICS343. For more than three outputs, see

the ICS345 or ICS348.

Block Diagram

VDD

SEL

Crystal or

clock input

X1/ICLK

OTP ROM

with PLL

Divider

Values

CLK1

PLL Clock Synthesis,

Spred Spectrum and

Control Circuitry

Crystal

Oscillator

External capacitors are

required with a crystal input.

CLK2

GND

PDTS (both outputs and PLL)

IDT® / ICS™

FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER 1

ICS342

REV N 090613

342MI-XXLF Related Products

	342MI-XXLF	342MI-XXLFT	342M-XXLF	342M-XXLFT
Description	Clock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8	Clock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8	Clock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8	Clock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8
Is it lead-free?	Lead free	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to	conform to
Parts packaging code	SOIC	SOIC	SOIC	SOIC
package instruction	SOP,	SOP,	SOP,	SOP,
Contacts	8	8	8	8
Reach Compliance Code	compliant	compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99
JESD-30 code	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8
JESD-609 code	e3	e3	e3	e3
length	4.9 mm	4.9 mm	4.9 mm	4.9 mm
Humidity sensitivity level	1	1	1	1
Number of terminals	8	8	8	8
Maximum operating temperature	85 °C	85 °C	70 °C	70 °C
Maximum output clock frequency	200 MHz	200 MHz	200 MHz	200 MHz
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP	SOP	SOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260	260	260	260
Master clock/crystal nominal frequency	50 MHz	50 MHz	50 MHz	50 MHz
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.75 mm	1.75 mm	1.75 mm	1.75 mm
Maximum supply voltage	3.45 V	3.45 V	3.45 V	3.45 V
Minimum supply voltage	3.15 V	3.15 V	3.15 V	3.15 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Matte Tin (Sn)	Matte Tin (Sn)	Matte Tin (Sn)	Matte Tin (Sn)
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30
width	3.9 mm	3.9 mm	3.9 mm	3.9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER
Maker	IDT (Integrated Device Technology)	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)

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