EtronTech
Features
•
Organized as 1M words by 16 bits
•
Fast Cycle Time : 55ns, 70ns
•
Standby Current : 100uA
•
Deep power-down Current : 10uA (Memory cell data
invalid)
•
Byte data control: LB# (DQ0 - 7), UB# (DQ8 - 15)
•
Compatible with low power SRAM
•
Single Power Supply Voltage : 3.0V±0.3V
•
Package Type : 48-ball FBGA, 6x8mm
EM566168
1M x 16 Pseudo SRAM
Rev 1.1
Apr. 2004
Pin Assignment 48-Ball BGA, Top View
1
2
3
4
5
6
A
LB#
OE#
A0
A1
A2
CE2
B
DQ8
UB#
A3
A4
CE1#
DQ0
C
DQ9
DQ10
A5
A6
DQ1
DQ2
Pin Description
Symbol
A0 – A19
DQ0 – DQ15
CE1#
CE2
OE#
WE#
LB#
UB#
V
CC
V
SS
Function
Address Inputs
Data Inputs/Outputs
Chip Enable
Deep Power Down
Output Enable
Write Control
Lower Byte Control
Upper Byte Control
Power Supply
Ground
D
VSS
DQ11
A17
A7
DQ3
VCC
E
VCC
DQ12
NC
A16
DQ4
VSS
F
DQ14
DQ13
A14
A15
DQ5
DQ6
G
DQ15
A19
A12
A13
WE#
DQ7
H
A18
A8
A9
A10
A11
NC
Overview
The EM566168 is a 16M-bit Pseudo SRAM organized as 1M words by 16 bits. It is designed with advanced
CMOS technology specified RAM featuring low power static RAM compatible function and pin configuration.
This device operates from a single power supply. Advanced circuit technology provides both high speed and
low power. It is automatically placed in low-power mode when CE1# or both UB# and LB# are asserted high or
CE2 is asserted low. There are three control inputs. CE1# and CE2 are used to select the device, and output
enable (OE#) provides fast memory access. Data byte control pins (LB#,UB#) provide lower and upper byte
access. This device is well suited to various microprocessor system applications where high speed, low power
and battery backup are required. And, with a guaranteed wide operating range, the EM566168 can be used in
environments exhibiting extreme temperature conditions.
Pin Location
Symbol Location Symbol Location Symbol Location Symbol Location Symbol
A0
A3
A8
H2
A16
E4
DQ3
D5
DQ11
A1
A4
A9
H3
A17
D3
DQ4
E5
DQ12
A2
A5
A10
H4
A18
H1
DQ5
F5
DQ13
A3
B3
A11
H5
A19
G2
DQ6
F6
DQ14
A4
B4
A12
G3
NC
H6
DQ7
G6
DQ15
A5
C3
A13
G4
DQ0
B6
DQ8
B1
CE1#
A6
C4
A14
F3
DQ1
C5
DQ9
C1
CE2
A7
D4
A15
F4
DQ2
C6
DQ10
C2
OE#
Location Symbol Location
D2
WE#
G5
E2
LB#
A1
F2
UB#
B2
F1
VCC
D6
G1
VCC
E1
B5
GND
D1
A6
GND
E6
A2
NC
E3
Etron Technology, Inc.
No. 6, Technology Rd. V, Science-Based Industrial Park, Hsinchu, Taiwan 30077, R.O.C.
TEL: (886)-3-5782345
FAX: (886)-3-5778671
Etron Technology, Inc., reserves the right to make changes to its products and specifications without notice.
EtronTech
Block Diagram
Standby/Deep Power
Down Mode Control
EM566168
VCC
VSS
Refresh Control
Memory Cell Array
Refresh
Counter
Row
Address
Decoder
1M x 16
A0 – A19
Address
Buffer
DQ0 – DQ7
DQ8 – DQ15
Input
Data
Control
Sense AMP
Output
Data
Control
Column Decoder
Address Buffer
CE1#
CE2
OE#
WE#
LB#
UB#
Control
Logic
2
Rev 1.1
Apr. 2004
EtronTech
Operating Mode
CE1# CE2 OE# WE# LB# UB# DQ0~DQ7 DQ8~DQ15
H
X
L
L
L
L
L
L
L
L
L
H
L
H
H
H
H
H
H
H
H
H
X
X
X
H
H
L
L
L
X
X
X
X
X
X
H
H
H
H
H
L
L
L
X
X
H
L
X
L
H
L
L
H
L
X
X
H
X
L
H
L
L
H
L
L
High-Z
High-Z
High-Z
High-Z
High-Z
D-out
High-Z
D-out
D-in
High-Z
D-in
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
D-out
D-out
High-Z
D-in
D-in
Mode
Deselect
Deselect
Deselect
Output Disabled
Output Disabled
Lower Byte Read
Upper Byte Read
Word Read
Lower Byte Write
Upper Byte Write
Word Write
EM566168
Power
Standby
Deep Power Down
Standby
Active
Active
Active
Active
Active
Active
Active
Active
Note:
X=don’t care. H=logic high. L=logic low.
1)
Absolute Maximum Ratings
Supply voltage, V
CC
Input voltages, V
IN
-0.2 to +3.6V
-0.2 to VCC + 0.3V
-2.0 to +3.6V*
100 mA
-25 to +85°C
-65 to +125°C
240°C
1W
Input and output voltages, V
IN
, V
OUT
Output short circuit current I
SH
Operating temperature, T
A
Storage temperature, T
STRG
Soldering Temperature (10s), T
SOLDER
Power dissipation, P
D
Note:
Absolute maximum DC requirements contains stress ratings only. Functional operation at the absolute
maximum limits is not implied or guaranteed. Extended exposure to maximum ratings may affect device
reliability.
Recommended DC Operating Conditions
Symbol
V
CC
V
SS
V
IH
V
IL
Notes:
1. Overshoot: VCC + 2.0V in case of pulse width
≤
20ns
2. Undershoot: -2.0V in case of pulse width
≤
20ns
3. Overshoot and undershoot are sampled, not 100% tested.
Parameter
Power Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Min.
2.7
0
2.2
-0.2
2)
Typ.
3.0
−
−
−
Max.
3.3
0
V
CC
+0.2
+0.6
1)
Unit
V
V
V
V
3
Rev 1.1
Apr. 2004
EtronTech
DC Characteristics
Symbol
ILI
Parameter
Input Leakage
Current
Output Leakage
Current
Test Conditions
VIN = VSS to VDD
VIO = VSS to VDD
CE1# = VIH, CE2 = VIL or
OE# = VIH or WE# = VIL
Operating Current @
Min Cycle Time
Cycle time = Min., 100%
duty, IIO = 0mA, CE1# =
VIL, CE2 = VIH, VIN =
VIH or VIL
Cycle time = 1µs, 100% duty
ICC2
Operating Current @
Max Cycle Time
(1µs)
IIO = 0mA, CE1#
≤
0.2V,
CE2
≥
VDD -0.2V, VIN
≤
0.2V
or VIN
≥
VDD -0.2V
CE1# = VDD – 0.2V and
CE2 = VDD – 0.2V,
Other inputs = VSS ~ VCC
ISBD
VOL
VOH
Deep Power Down
Output Low Voltage
Output High Voltage
CE2
≤
0.2V, Other inputs =
VSS ~ VCC
IOL = 2.1mA
IOH = -1.0mA
−
2.4
−
−
55ns
−
70ns
Min.
-1
EM566168
Max.
1
Unit
µA
ILO
-1
1
µA
35
mA
30
ICC1
3
mA
ISB1
Standby Current
(CMOS)
100
µA
10
0.4
−
µA
V
V
Capacitance (Ta = 25°C; f = 1 MHz)
Parameter
Input capacitance
Output capacitance
Symbol
CIN
COUT
Min
−
−
Typ
−
−
Max
8
10
Unit
pF
pF
Test Conditions
VIN = GND
VOUT = GND
Notes:
These parameters are sampled and not 100% tested.
4
Rev 1.1
Apr. 2004
EtronTech
Symbol
Parameter
Min
Read Cycle
tRC
tAA
tCO1
tCO2
tOE
tBA
tLZ
tOLZ
tBLZ
tHZ
tOHZ
tBHZ
tOH
tWC
tWP
tAW
tCW
tBW
tAS
tWR
tWHZ
tOW
tDW
tDH
Read cycle time
Address access time
Chip Enable (CE1#) Access Time
Chip Enable (CE2) Access Time
Output enable access time
Data Byte Control Access Time
Chip Enable Low to Output in Low-Z
Output enable Low to Output in Low-Z
Data Byte Control Low to Output in Low-Z
Chip Enable High to Output in High-Z
Output Enable High to Output in High-Z
Data Byte Control High to Output in High-Z
Output Data Hold Time
Write Cycle
Write Cycle Time
Write Pulse Width
Address Valid to End of Write
Chip Enable to End of Write
Data Byte Control to End of Write
Address Setup Ttime
Write Recovery Time
WE# Low to Output in High-Z
WE# High to Output in Low-Z
Data to Write Overlap
Data Hold Time
55
45
45
45
45
0
0
−
5
30
0
−
−
−
−
−
−
−
20
−
−
−
70
50
60
60
60
0
0
−
5
30
0
55
−
−
−
−
−
10
5
10
−
−
−
10
−
55
55
55
25
55
−
−
−
20
20
20
−
70
−
−
−
−
−
10
5
10
−
−
−
10
-55
Max
Min
EM566168
AC Characteristics and Operating Conditions (Ta = -25°C to 85°C, VCC = 2.7V to 3.3V)
-70
Max
Unit
−
70
70
70
35
70
−
−
−
25
25
25
−
−
−
−
−
−
−
−
20
−
−
−
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC Test Condition
•
Output load : 50pF + one TTL gate
•
Input pulse level : 0.4V, 2.4
•
Timing measurements : 0.5 x VCC
•
tR, tF : 5ns
5
Rev 1.1
Apr. 2004
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