FAN73933 — Half-Bridge Gate Driver
December 2009
FAN73933
Half-Bridge Gate Drive IC
Features
Floating Channel for Bootstrap Operation to +600V
Typically 2.5A/2.5A Sourcing/Sinking Current Driving
Capability
Extended Allowable Negative V
S
Swing to -9.8V for
Signal Propagation at V
BS
=15V
Output in Phase with Input Signal
3.3V and 5V Input Logic Compatible
Matched Propagation Delay for Both Channels
Built-in UVLO Functions for Both Channels
Built-in Common-Mode dv/dt Noise Cancelling Circuit
Programmable Dead-Time Control Function
Internal 220ns Minimum Dead Time at R
DT
=0Ω
Description
The FAN73933 is a half-bridge, gate-drive IC with pro-
grammable dead-time control functions that can drive
high-speed MOSFETs and IGBTs operating up to +600V.
It has a buffered output stage with all NMOS transistors
designed for high-pulse-current driving capability and
minimum cross-conduction.
Fairchild’s high-voltage process and common-mode
noise canceling techniques provide stable operation of
the high-side driver under high dv/dt noise circum-
stances. An advanced level-shift circuit offers high-side
gate driver operation up to V
S
=-9.8V (typical) for
V
BS
=15V.
The UVLO circuit prevents malfunction when V
DD
and
V
BS
are lower than the specified threshold voltage.
The high-current and low-output voltage drop feature
makes this device suitable for diverse half- and full-
bridge inverters; motor drive inverters, switching mode
power supplies, induction heating, and high-power DC-
DC converter applications.
Applications
High-Speed Power MOSFET and IGBT Gate Driver
Induction Heating
High-Power DC-DC Converter
Synchronous Step-Down Converter
Motor Drive Inverter
14-SOP
Ordering Information
Part Number
FAN73933M
FAN73933MX
Package
14-Lead, Small Outline Integrated
Circuit (SOIC), Non-JEDEC, .150
Inch Narrow Body, 225SOP
Operating
Temperature
Range
-40°C to +125°C
Eco
Status
RoHS
Packing Method
Tube
Tape & Reel
For Fairchild’s definition of Eco Status, please visit:
http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2009 Fairchild Semiconductor Corporation
FAN73933 • Rev. 1.0.0
www.fairchildsemi.com
FAN73933 — Half-Bridge Gate Driver
Typical Application Diagrams
+15V
R
BOOT
D
BOOT
FAN73933
Controller
HIN
LIN
1 HIN
2 LIN
3
R
DT
4 DT
5 COM
6 LO
7 V
DD
V
S
11
NC 10
NC 9
NC 8
R3
V
SS
NC 14
V
B
13
HO 12
C
BOOT
R1
Up to 600V
R2
Load
R4
Figure 1. Typical Application Circuit
Internal Block Diagram
13 V
B
UVLO
DRIVER
PULSE
GENERATOR
HIN 1
250K
HS(ON/OFF)
NOISE
CANCELLER
R
S
R
Q
12 HO
SCHMITT
TRIGGER INPUT
11 V
S
7 V
DD
LIN
2
250K
R
DTINT
SHOOT THOUGH
PREVENTION
UVLO
DRIVER
DT
4
DEAD-TIME
{ DTMIN=220ns }
LS(ON/OFF)
VSS/COM
LEVEL
SHIFT
DELAY
6 LO
V
SS
3
5
Pin 8, 9, 10 and 14 are no connection
COM
Figure 2. Functional Block Diagram
© 2009 Fairchild Semiconductor Corporation
FAN73933 • Rev. 1.0.0
www.fairchildsemi.com
2
FAN73933 — Half-Bridge Gate Driver
Pin Configuration
HIN
LIN
V
SS
DT
COM
LO
V
DD
1
2
14
13
NC
V
B
HO
V
S
NC
NC
NC
FAN73933
3
4
5
6
7
12
11
10
9
8
Figure 3. Pin Configurations (Top View)
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Name
HIN
LIN
V
SS
DT
COM
LO
V
DD
NC
NC
NC
V
S
HO
V
B
NC
Description
Logic Input for High-Side Gate Driver Output
Logic Input for Low-Side Gate Driver Output
Logic Ground
Dead-Time Control with External Resistor (Referenced to V
SS
)
Ground
Low-Side Driver Return
Supply Voltage
No Connection
No Connection
No Connection
High-Voltage Floating Supply Return
High-Side Driver Output
High-Side Floating Supply
No Connection
© 2009 Fairchild Semiconductor Corporation
FAN73933 • Rev. 1.0.0
www.fairchildsemi.com
3
FAN73933 — Half-Bridge Gate Driver
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. T
A
=25°C unless otherwise specified.
Symbol
V
B
V
S
V
HO
V
LO
V
DD
V
IN
DT
V
SS
dV
S
/dt
P
D
θ
JA
T
J
T
STG
Notes:
Characteristics
High-Side Floating Supply Voltage
High-Side Floating Offset Voltage
High-Side Floating Output Voltage
Low-Side Output Voltage
Low-Side and Logic Fixed Supply Voltage
Logic Input Voltage (HIN and LIN)
Programmable Dead-Time Pin Voltage
Logic Ground
Allowable Offset Voltage Slew Rate
Power Dissipation
(1, 2, 3)
Thermal Resistance
Junction Temperature
Storage Temperature
Min.
-0.3
V
B
-25.0
V
S
-0.3
-0.3
-0.3
-0.3
-0.3
V
DD
-25
Max.
625.0
V
B
+0.3
V
B
+0.3
V
DD
+0.3
25.0
V
DD
+0.3
V
DD
+0.3
V
DD
+0.3
± 50
1
110
+150
Unit
V
V
V
V
V
V
V
V
V/ns
W
°C/W
°C
°C
-55
+150
1 Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material).
2 Refer to the following standards:
JESD51-2: Integral circuits thermal test method environmental conditions - natural convection, and
JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages.
3 Do not exceed maximum P
D
under any circumstances.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
B
V
S
V
HO
V
DD
V
LO
V
IN
DT
V
SS
T
A
Parameter
High-Side Floating Supply Voltage
High-Side Floating Supply Offset Voltage
High-Side Output Voltage
Low-Side and Logic Fixed Supply Voltage
Low-Side Output Voltage
Logic Input Voltage (HIN and LIN)
Programmable Dead-Time Pin Voltage
Logic Ground
Operating Ambient Temperature
Min.
V
S
+10
6-V
DD
V
S
10
COM
V
SS
V
SS
-5
-40
Max.
V
S
+20
600
V
B
20
V
DD
V
DD
V
DD
+5
+125
Unit
V
V
V
V
V
V
V
V
°C
© 2009 Fairchild Semiconductor Corporation
FAN73933 • Rev. 1.0.0
www.fairchildsemi.com
4
FAN73933 — Half-Bridge Gate Driver
Electrical Characteristics
V
BIAS
(V
DD
, V
BS
)=15.0V, V
SS
=COM=0V, DT=V
SS
and T
A
= 25°C, unless otherwise specified. The V
IN
and I
IN
parameters are referenced to V
SS
/COM and are applicable to the respective input leads: HIN and LIN. The V
O
and I
O
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
I
QDD
I
QBS
I
PDD
I
PBS
I
LK
V
DDUV+
V
BSUV+
V
DDUV-
V
BSUV-
V
DDUVH-
V
BSUVH
V
IH
V
IL
I
IN+
I
IN-
R
IN
V
OH
V
OL
I
O+
I
O-
V
S
Characteristics
Quiescent V
DD
Supply Current
Quiescent V
BS
Supply Current
Operating V
DD
Supply Current
Operating V
BS
Supply Current
Offset Supply Leakage Current
V
DD
and V
BS
Supply Under-Voltage
Positive-Going Threshold Voltage
V
DD
and V
BS
Supply Under-Voltage
Negative-Going Threshold Voltage
V
DD
and V
BS
Supply Under-Voltage Lockout
Hysteresis Voltage
Logic “1” Input Voltage for HO & Logic “0” for LO
Logic “0” Input Voltage for HO & Logic “1” for LO
Logic Input High Bias Current
Logic Input Low Bias Current
Logic Input Pull-Down Resistance
High-Level Output Voltage (V
BIAS
- V
O
)
Low-Level Output Voltage
Output High, Short-Circuit Pulsed Current
(4)
Output Low, Short-Circuit Pulsed Current
(4)
Allowable Negative V
S
Pin Voltage for IN Signal
Propagation to HO
Test Condition
V
IN
=0V or 5V
V
IN
=0V or 5V
f
IN
=20KHz, No Load
C
L
=1nF, f
IN
=20KHz, rms
V
B
=V
S
=600V
Min. Typ. Max. Unit
0.9
50
1.3
450
1.5
100
1.9
800
10
mA
μA
mA
μA
μA
POWER SUPPLY SECTION
BOOTSTRAPPED SUPPLY SECTION
V
IN
=0V, V
DD
=V
BS
=Sweep
V
IN
=0V, V
DD
=V
BS
=Sweep
V
IN
=0V, V
DD
=V
BS
=Sweep
8.0
7.4
9.0
8.4
0.6
10
9.4
V
V
V
INPUT LOGIC SECTION
2.5
0.8
V
IN
=5V
V
IN
=0V
100
No Load
No Load
V
HO
=0V, V
IN
=5V, PW
≤10µs
V
HO
=15V,V
IN
=0V, PW
≤10µs
2.0
2.0
2.5
2.5
-9.8
-7.0
250
1.5
100
20
50
2
V
V
μA
μA
KΩ
V
mV
A
A
V
GATE DRIVER OUTPUT SECTION
Note:
4. These parameters guaranteed by design.
© 2009 Fairchild Semiconductor Corporation
FAN73933 • Rev. 1.0.0
www.fairchildsemi.com
5
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