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CAT28LV256T13E-30

Description
32KX8 EEPROM 3V, 300ns, PDSO28, 8 X 13.40 MM, TSOP-28
Categorystorage    storage   
File Size70KB,12 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Download Datasheet Parametric View All

CAT28LV256T13E-30 Overview

32KX8 EEPROM 3V, 300ns, PDSO28, 8 X 13.40 MM, TSOP-28

CAT28LV256T13E-30 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerON Semiconductor
Parts packaging codeTSOP
package instruction8 X 13.40 MM, TSOP-28
Contacts28
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time300 ns
command user interfaceNO
Data pollingYES
Durability100000 Write/Erase Cycles
JESD-30 codeR-PDSO-G28
JESD-609 codee0
length11.8 mm
memory density262144 bit
Memory IC TypeEEPROM
memory width8
Humidity sensitivity level2
Number of functions1
Number of terminals28
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
organize32KX8
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP1
Encapsulate equivalent codeTSSOP28,.53,22
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
page size64 words
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)240
power supply3.3 V
Programming voltage3 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum standby current0.00015 A
Maximum slew rate0.015 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch0.55 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
switch bitYES
width8 mm
Maximum write cycle time (tWC)10 ms
CAT28LV256
256K-Bit CMOS PARALLEL EEPROM
FEATURES
s
3.0V to 3.6V Supply
s
Read Access Times: 200/250/300 ns
s
Low Power CMOS Dissipation:
s
CMOS and TTL Compatible I/O
s
Automatic Page Write Operation:
– Active: 15 mA Max.
– Standby: 150
µ
A Max.
s
Simple Write Operation:
– 1 to 64 Bytes in 10ms
– Page Load Timer
s
End of Write Detection:
– On-Chip Address and Data Latches
– Self-Timed Write Cycle with Auto-Clear
s
Fast Write Cycle Time:
– Toggle Bit
DATA
Polling
s
Hardware and Software Write Protection
s
100,000 Program/Erase Cycles
s
100 Year Data Retention
– 10ms Max.
s
Commercial, Industrial and Automotive
Temperature Ranges
DESCRIPTION
The CAT28LV256 is a fast, low power, low voltage
CMOS Parallel E
2
PROM organized as 32K x 8-bits. It
requires a simple interface for in-system programming.
On-chip address and data latches, self-timed write cycle
with auto-clear and V
CC
power up/down write protection
eliminate additional timing and protection hardware.
DATA
Polling and Toggle status bits signal the start and
end of the self-timed write cycle. Additionally, the
CAT28LV256 features hardware and software write
protection.
The CAT28LV256 is manufactured using Catalyst’s
advanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 100 years. The device is available in JEDEC–
approved 28-pin DIP, 28-pin TSOP or 32-pin PLCC
packages.
BLOCK DIAGRAM
A6–A14
ADDR. BUFFER
& LATCHES
INADVERTENT
WRITE
PROTECTION
ROW
DECODER
32,768 x 8
E
2
PROM
ARRAY
64 BYTE PAGE
REGISTER
VCC
HIGH VOLTAGE
GENERATOR
CE
OE
WE
CONTROL
LOGIC
I/O BUFFERS
TIMER
DATA POLLING
AND
TOGGLE BIT
COLUMN
DECODER
28LV256 F01
I/O0–I/O7
A0–A5
ADDR. BUFFER
& LATCHES
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
1
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