High Voltage Latch-Up Proof,
Quad SPST Switches
ADG5212/ADG5213
FEATURES
Latch-up proof
3 pF off source capacitance
5 pF off drain capacitance
0.07 pC charge injection
Low leakage: 0.2 nA maximum at 85ºC
±9 V to ±22 V dual-supply operation
9 V to 40 V single-supply operation
48 V supply maximum ratings
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
V
SS
to V
DD
analog signal range
FUNCTIONAL BLOCK DIAGRAMS
S1
IN1
D1
S2
IN2
D2
IN2
D2
IN1
D1
S2
S1
ADG5212
IN3
S3
IN3
D3
S4
ADG5213
S3
D3
S4
IN4
09767-001
APPLICATIONS
Automatic test equipment
Data acquisition
Instrumentation
Avionics
Audio and video switching
Communication systems
IN4
D4
D4
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
Figure 1.
GENERAL DESCRIPTION
The ADG5212/ADG5213 contain four independent single-
pole/single-throw (SPST) switches. The ADG5212 switches
turn on with Logic 1. The ADG5213 has two switches with
digital control logic similar to that of the ADG5212; however,
the logic is inverted on the other two switches. Each switch
conducts equally well in both directions when on, and each
switch has an input signal range that extends to the supplies.
In the off condition, signal levels up to the supplies are blocked.
The ADG5212 and ADG5213 do not have a V
L
pin. The digital
inputs are compatible with 3 V logic inputs over the full
operating supply range.
The ultralow capacitance and charge injection of these switches
make them ideal solutions for data acquisition and sample-and-
hold applications, where low glitch and fast settling are required.
Fast switching speed together with high signal bandwidth make
the parts suitable for video signal switching.
PRODUCT HIGHLIGHTS
1.
Trench Isolation Guards Against Latch-Up.
A dielectric trench separates the P and N channel transistors,
thereby preventing latch-up even under severe overvoltage
conditions.
Ultralow Capacitance and <1 pC Charge Injection.
Dual-Supply Operation.
For applications where the analog signal is bipolar, the
ADG5212/ADG5213 can be operated from dual supplies of
up to ±22 V.
Single-Supply Operation.
For applications where the analog signal is unipolar, the
ADG5212/ADG5213 can be operated from a single rail
power supply of up to 40 V.
3 V Logic-Compatible Digital Inputs.
V
INH
= 2.0 V, V
INL
= 0.8 V.
No V
L
Logic Power Supply Required.
2.
3.
4.
5.
6.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
ADG5212/ADG5213
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagrams............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
±15 V Dual Supply ....................................................................... 3
±20 V Dual Supply ....................................................................... 4
12 V Single Supply........................................................................ 5
36 V Single Supply........................................................................ 6
Continuous Current per Channel, Sx or Dx..............................7
Absolute Maximum Ratings ............................................................8
ESD Caution...................................................................................8
Pin Configurations and Function Descriptions ............................9
Typical Performance Characteristics ........................................... 10
Test Circuits..................................................................................... 14
Terminology .................................................................................... 16
Trench Isolation.............................................................................. 17
Applications Information .............................................................. 18
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 19
REVISION HISTORY
4/11—Revision 0: Initial Version
Rev. 0 | Page 2 of 20
ADG5212/ADG5213
SPECIFICATIONS
±15 V DUAL SUPPLY
V
DD
= +15 V ± 10%, V
SS
= −15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, R
ON
25°C
−40°C to +85°C
−40°C to +125°C
V
DD
to V
SS
160
200
2
8
38
50
0.01
0.1
0.01
0.1
0.02
0.2
0.2
0.4
250
9
65
280
10
70
Unit
V max
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
dB typ
pF typ
pF typ
pF typ
μA typ
μA max
μA typ
μA max
V min/V max
Test Conditions/Comments
On-Resistance Match Between Channels, ∆R
ON
On-Resistance Flatness, R
FLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off)
V
S
= ±10 V, I
S
= −1 mA,
see Figure 24
V
DD
= +13.5 V, V
SS
= −13.5 V
V
S
= ±10 V, I
S
= −1 mA
V
S
= ±10 V, I
S
= −1 mA
V
DD
= +16.5 V, V
SS
= −16.5 V
V
S
= ±10 V, V
D
=
∓10
V,
see Figure 23
V
S
= ±10 V, V
D
=
∓10
V,
see Figure 23
V
S
= V
D
= ±10 V, see Figure 26
Drain Off Leakage, I
D
(Off)
0.2
0.25
0.4
0.9
2.0
0.8
Channel On Leakage, I
D
(On), I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
1
t
ON
t
OFF
Break-Before-Make Time Delay, t
D
(ADG5213 Only)
Charge Injection, Q
INJ
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
Insertion Loss
C
S
(Off)
C
D
(Off)
C
D
(On), C
S
(On)
POWER REQUIREMENTS
I
DD
I
SS
V
DD
/V
SS
1
0.002
±0.1
3
175
210
140
170
40
V
IN
= V
GND
or V
DD
255
195
280
215
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 10 V, see Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 10 V, see Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S1
= V
S2
= 10 V, see Figure 29
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF,
see Figure 31
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 25
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 27
R
L
= 50 Ω, C
L
= 5 pF, see Figure 28
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 28
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
DD
= +16.5 V, V
SS
= −16.5 V
Digital inputs = 0 V or V
DD
Digital inputs = 0 V or V
DD
GND = 0 V
20
0.07
−105
−105
435
−6.8
3
5
8
45
55
0.001
70
1
±9/±22
Guaranteed by design; not subject to production test.
Rev. 0 | Page 3 of 20
ADG5212/ADG5213
±20 V DUAL SUPPLY
V
DD
= +20 V ± 10%, V
SS
= −20 V ± 10%, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, R
ON
25°C
−40°C to +85°C
−40°C to +125°C
V
DD
to V
SS
140
160
1.5
8
33
45
0.01
0.1
0.01
0.1
0.02
0.2
0.2
0.4
200
230
Unit
V
max
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
dB typ
pF typ
pF typ
pF typ
Test Conditions/Comments
On-Resistance Match Between
Channels, ∆R
ON
On-Resistance Flatness, R
FLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off )
V
S
= ±15 V, I
S
= −1 mA,
see Figure 24
V
DD
= +18 V, V
SS
= −18 V
V
S
= ±15 V, I
S
= −1 mA
9
55
10
60
V
S
= ±15 V, I
S
= −1 mA
V
DD
= +22 V, V
SS
= −22 V
V
S
= ±15 V, V
D
=
∓15
V,
see
Figure 23
V
S
= ±15 V, V
D
=
∓15
V,
see
Figure 23
V
S
= V
D
= ±15 V, see Figure 26
Drain Off Leakage, I
D
(Off )
0.2
0.25
0.4
0.9
2.0
0.8
Channel On Leakage, I
D
(On), I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
1
t
ON
t
OFF
Break-Before-Make Time Delay, t
D
(ADG5213 Only)
Charge Injection, Q
INJ
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
Insertion Loss
C
S
(Off )
C
D
(Off )
C
D
(On), C
S
(On)
0.002
±0.1
3
155
195
145
165
35
V
IN
= V
GND
or V
DD
235
185
255
210
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 10 V, see Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 10 V, see Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S1
= V
S2
= 10 V, see Figure 29
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF,
see Figure 31
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 25
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 27
R
L
= 50 Ω, C
L
= 5 pF, see
Figure 28
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 28
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
20
−0.5
−105
−105
460
−6
2.8
4.8
8
Rev. 0 | Page 4 of 20
ADG5212/ADG5213
Parameter
POWER REQUIREMENTS
I
DD
I
SS
V
DD
/V
SS
1
25°C
50
70
0.001
−40°C to +85°C
−40°C to +125°C
Unit
μA typ
μA max
μA typ
μA max
V min/V max
Test Conditions/Comments
V
DD
= +22 V, V
SS
= −22 V
Digital inputs = 0 V or V
DD
Digital inputs = 0 V or V
DD
GND = 0 V
110
1
±9/±22
Guaranteed by design; not subject to production test.
12 V SINGLE SUPPLY
V
DD
= 12 V ± 10%, V
SS
= 0 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, R
ON
25°C
−40°C to +85°C
−40°C to +125°C
0 V to V
DD
350
500
4
20
160
280
0.01
0.1
0.01
0.1
0.02
0.2
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
1
t
ON
t
OFF
Break-Before-Make Time Delay, t
D
(ADG5213 Only)
Charge Injection, Q
INJ
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
0.2
0.4
610
21
335
700
22
370
Unit
V max
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
Test Conditions/Comments
On-Resistance Match Between Channels, ∆R
ON
On-Resistance Flatness, R
FLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off)
V
S
= 0 V to 10 V, I
S
= −1 mA,
see
Figure 24
V
DD
= 10.8 V, V
SS
= 0 V
V
S
= 0 V to 10 V, I
S
= −1 mA
V
S
= 0 V to 10 V, I
S
= −1 mA
V
DD
= 13.2 V, V
SS
= 0 V
V
S
= 1 V/10 V, V
D
= 10 V/1 V,
see Figure 23
V
S
= 1 V/10 V, V
D
= 10 V/1 V,
see Figure 23
V
S
= V
D
= 1 V/10 V,
see Figure 26
Drain Off Leakage, I
D
(Off)
0.2
0.4
Channel On Leakage, I
D
(On), I
S
(On)
0.25
0.9
2.0
0.8
0.002
±0.1
3
235
290
165
205
85
V
IN
= V
GND
or V
DD
360
235
410
260
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 8 V, see Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 8 V, see Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S1
= V
S2
= 8 V, see Figure 29
V
S
= 6 V, R
S
= 0 Ω, C
L
= 1 nF,
see Figure 31
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 25
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 27
R
L
= 50 Ω, C
L
= 5 pF, see
Figure 28
50
−0.5
−105
−105
340
Rev. 0 | Page 5 of 20
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